IDT82V2108PX8 IDT, Integrated Device Technology Inc, IDT82V2108PX8 Datasheet - Page 139

• Manufacturer Part Number: IDT82V2108PX8
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX8

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX8

IDT82V2108
Table 64: T1/J1 Mode Register Map - Direct Register (Continued)
Programming Information
05A ~ 05C
05E ~ 05F
Framer 1
04A
04B
04C
04D
04E
05D
042
043
044
045
046
047
048
049
04F
050
051
052
053
054
055
056
057
058
059
070
0DA ~ 0DC
0DE ~ 0DF
Framer 2
0CC
0CD
0DD
0C2
0C3
0C4
0C5
0C6
0C7
0C8
0C9
0CA
0CB
0CE
0CF
0D0
0D1
0D2
0D3
0D4
0D5
0D6
0D7
0D8
0D9
0F0
15A ~ 15C
15E ~ 15F
Framer 3
14A
14B
14C
14D
14E
14F
15D
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
170
1DA ~ 1DC
1DE ~ 1DF
Framer4
1CA
1CB
1CC
1CD
1CE
1DD
1C2
1C3
1C4
1C5
1C6
1C7
1C8
1C9
1CF
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
1D8
1D9
1F0
T1/J1 Address
065 ~ 067
06C
06D
060
061
062
063
064
068
069
06A
06B
06E
06F
25A ~ 25C
25E ~ 25F
Framer 5
24C
24D
25D
242
243
244
245
246
247
248
249
24A
24B
24E
24F
250
251
252
253
254
255
256
257
258
259
270
2DA ~ 2DC
2DE ~ 2DF
Framer 6
2CA
2CB
2CC
2CD
2CE
2CF
2DD
2C2
2C3
2C4
2C5
2C6
2C7
2C8
2C9
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2D8
2D9
2F0
129
35A ~ 35C
35E ~ 35F
Framer 7
34C
34D
34E
35D
342
343
344
345
346
347
348
349
34A
34B
34F
350
351
352
353
354
355
356
357
358
359
370
3DA ~ 3DC
3DE ~ 3DF
Framer8
3DD
3C4
3C7
3C8
3CA
3CB
3CC
3CD
3CE
3CF
3D0
3D1
3D2
3D3
3D4
3D9
3C2
3C3
3C5
3C6
3C9
3D5
3D6
3D7
3D8
3F0
RCRB CH Indirect Data Buffer (COSS = 0) /
RHDLC #1, 2, 3 Secondary Address Match
RCRB CH IND Addr/Control (COSS = 0) /
RPLC Channel Indirect Address/Control
RHDLC #1, 2, 3 Primary Address Match
RHDLC 2 (TXCISEL = 0) Link Control /
THDLC 2 (TXCISEL = 1) Link Control
RPLC Channel Indirect Data Buffer
RHDLC #1, 2, 3 Interrupt Control
RCRB COSS[16:9] (COSS = 1)
PMON Interrupt Enable/Status
RCRB COSS[8:1] (COSS = 1)
RHDLC #1, 2, 3 Configuration
PRGD Interrupt Enable/Status
PRGD Shift Register Length
PRGD Pattern Insertion #1
PRGD Pattern Insertion #2
PRGD Pattern Insertion #3
PRGD Pattern Insertion #4
PRGD Pattern Detector #1
PRGD Pattern Detector #2
PRGD Pattern Detector #3
PRGD Pattern Detector #4
PMON BEE Count (MSB)
PMON FER Count (MSB)
PMON BEE Count (LSB)
PMON FER Count (LSB)
RPLC µP Access Status
RHDLC #1, 2, 3 Status
FRMG Alarm Transmit
IBCG Loop-back Code
T1 / E1 / J1 OCTAL FRAMER
PRGD Error Insertion
RHDLC #1, 2, 3 Data
FRMG Configuration
PMON COFA Count
RPLC Configuration
IBCG Configuration
PMON OOF Count
PRGD Control
TBOM Code
PRGD Tap
Reserved
Reserved
Reserved
Reserved
Register
March 5, 2009