ISP1181BDGG ST-Ericsson Inc, ISP1181BDGG Datasheet - Page 10

• Manufacturer Part Number: ISP1181BDGG
• Description: IC USB CNTRLR FULL-SPD 48-TSSOP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1181BDGG

• Controller Type: USB Peripheral Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 26mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1002-5; ISP1181BDGG,112

Philips Semiconductors
7. Functional description
9397 750 13958
Product data
7.1 Analog transceiver
7.2 Philips Serial Interface Engine (SIE)
7.3 Memory Management Unit (MMU) and integrated RAM
7.4 SoftConnect
The ISP1181B is a full-speed USB peripheral controller with up to 14 configurable
endpoints. It has a fast general-purpose parallel interface for communication with
many types of microcontrollers or microprocessors. It supports different bus
configurations (see
block diagram is given in
The ISP1181B has 2462 bytes of internal FIFO memory, which is shared among the
enabled USB endpoints. The type and FIFO size of each endpoint can be individually
configured, depending on the required packet size. Isochronous and bulk endpoints
are double-buffered for increased data throughput.
The ISP1181B requires a single supply voltage of 3.3 V or 5.0 V and has an internal
3.3 V voltage regulator for powering the analog USB transceiver. It supports
bus-powered operation.
The ISP1181B operates on a 6 MHz oscillator frequency. A programmable clock
output is available up to 48 MHz. During ‘suspend’ state the 100 kHz
LazyClock frequency can be output.
The transceiver is compliant with the Universal Serial Bus Specification Rev. 2.0 (full
speed) . It interfaces directly with the USB cable through external termination
resistors.
The Philips SIE implements the full USB protocol layer. It is completely hardwired for
speed and needs no firmware intervention. The functions of this block include:
synchronization pattern recognition, parallel/serial conversion, bit (de-)stuffing, CRC
checking/generation, Packet IDentifier (PID) verification/generation, address
recognition, handshake evaluation/generation.
The MMU and the integrated RAM provide the conversion between the USB speed
(12 Mbit/s bursts) and the parallel interface to the microcontroller (max. 12 Mbyte/s).
This allows the microcontroller to read and write USB packets at its own speed.
The connection to the USB is accomplished by bringing D (for full-speed USB
peripherals) HIGH through a 1.5 k pull-up resistor. In the ISP1181B, the 1.5 k
pull-up resistor is integrated on-chip and is not connected to V
connection is established by a command sent from the external/system
microcontroller. This allows the system microcontroller to complete its initialization
sequence before deciding to establish connection with the USB. Reinitialization of the
USB connection can also be performed without disconnecting the cable.
The ISP1181B will check for USB V
established. V
BUS
Rev. 02 — 07 December 2004
sensing is provided through pin V
Table
Figure
3) and local DMA transfers of up to 16 bytes per cycle. The
1.
BUS
availability before the connection can be
Full-speed USB peripheral controller
BUS
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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CC
ISP1181B
by default. The
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