ISP1181BDGG ST-Ericsson Inc, ISP1181BDGG Datasheet - Page 23

• Manufacturer Part Number: ISP1181BDGG
• Description: IC USB CNTRLR FULL-SPD 48-TSSOP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1181BDGG

• Controller Type: USB Peripheral Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 26mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1002-5; ISP1181BDGG,112

Philips Semiconductors
9397 750 13958
Product data
11.2 Resume conditions
11.3 Control bits in suspend and resume
A wake-up from the suspend state is initiated either by the USB host or by the
application:
The steps of a wake-up sequence are as follows:
Table 12:
Register
Interrupt
•
•
1. The internal oscillator and the PLL multiplier are re-enabled. When stabilized, the
2. The SUSPEND output is deasserted, and bit RESUME in the Interrupt register is
3. Maximum 15 ms after starting the wake-up sequence, the ISP1181B resumes its
4. In case of a remote wake-up, the ISP1181B drives a K-state on the USB bus for
5. Following the deassertion of output SUSPEND, the application restores itself and
6. After wake-up, the internal registers of the ISP1181B are write-protected to
Fig 7. SUSPEND and WAKEUP signals in a powered-off modem application.
USB host: drives a K-state on the USB bus (global resume)
Application: remote wake-up through a HIGH level on input WAKEUP or a LOW
level on input CS (if enabled using bit WKUPCS in the Hardware Configuration
register). Wake-up on CS will work only if V
clock signals are routed to all internal circuits of the ISP1181B.
set. This will generate an interrupt if bit IERESM in the Interrupt Enable register is
set.
normal functionality.
10 ms.
other system components to the normal operating mode.
prevent corruption by inadvertent writing during power-up of external
components. The firmware must send an Unlock Device command to the
ISP1181B to restore its full functionality.
Summary of control bits
USB
Rev. 02 — 07 December 2004
Bit
SUSPND
BUSTATUS
RESUME
V BUS
DP
DM
ISP1181B
V BUS
SUSPEND
WAKEUP
Function
a transition from awake to the suspend state was detected
monitors USB bus status (logic 1 = suspend); used when
interrupt is serviced
a transition from suspend to the resume state was detected
Full-speed USB peripheral controller
BUS
RING DETECTION
V CC
RST
is present.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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