ISP1181BDGG ST-Ericsson Inc, ISP1181BDGG Datasheet - Page 41

• Manufacturer Part Number: ISP1181BDGG
• Description: IC USB CNTRLR FULL-SPD 48-TSSOP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1181BDGG

• Controller Type: USB Peripheral Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 26mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1002-5; ISP1181BDGG,112

Philips Semiconductors
Table 48:
9397 750 13958
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Interrupt Register: bit allocation
BUSTATUS
EP14
EP6
31
23
15
R
R
R
R
R
7
0
0
0
7
0
12.3.6 Read Interrupt Register
Table 47:
This command indicates the sources of interrupts as stored in the 4-byte Interrupt
Register. Each individual endpoint has its own interrupt bit. The bit allocation of the
Interrupt Register is shown in
bus status in the interrupt service routine. Interrupts are enabled via the Interrupt
Enable Register, see
While reading the interrupt register, read all the 4 bytes completely.
Code (Hex): C0 — read interrupt register
Transaction — read 4 bytes
SP_EOT
Table 49:
Bit
15 to 8
7 to 0
Bit
31 to 24
23 to 10
9
EP13
EP5
30
22
14
R
R
R
R
R
6
0
0
0
6
0
Chip ID Register: bit description
Interrupt Register: bit description
Symbol
CHIPIDH[7:0]
CHIPIDL[7:0]
Symbol
-
EP14 to EP1
EP0IN
PSOF
EP12
EP4
29
21
13
R
R
R
R
R
5
0
0
0
5
0
Rev. 02 — 07 December 2004
Section
EP11
Description
chip ID code (81H)
silicon version (42H, with 42H representing the BCD encoded
version number)
Description
reserved
A logic 1 indicates the interrupt source(s): endpoint 14 to 1.
A logic 1 indicates the interrupt source: control IN endpoint.
SOF
EP3
28
20
12
R
R
R
R
R
4
0
0
0
4
0
CHIPIDL[7:0]
12.1.5.
Table
reserved
42H
48. Bit BUSTATUS is used to verify the current
EP10
EOT
EP2
27
19
11
R
R
R
R
R
3
0
0
0
3
0
Full-speed USB peripheral controller
SUSPND
EP9
EP1
26
18
10
R
R
R
R
R
2
0
0
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
RESUME
EP0IN
ISP1181B
EP8
25
17
R
R
R
R
R
1
0
0
9
0
1
0
EP0OUT
RESET
EP7
24
16
R
R
R
R
R
0
0
0
8
0
0
0
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