ISP1181BDGG ST-Ericsson Inc, ISP1181BDGG Datasheet - Page 21

• Manufacturer Part Number: ISP1181BDGG
• Description: IC USB CNTRLR FULL-SPD 48-TSSOP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1181BDGG

• Controller Type: USB Peripheral Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 26mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1002-5; ISP1181BDGG,112

Philips Semiconductors
11. Suspend and resume
9397 750 13958
Product data
11.1 Suspend conditions
The ISP1181B detects a USB suspend status when a constant idle state is present
on the USB bus for more than 3 ms.
The bus-powered devices that are suspended must not consume more than 500 A
of current. This is achieved by shutting down power to system components or
supplying them with a reduced voltage.
The steps leading up to suspend status are as follows:
Figure 6
1. On detecting a wake-up-to-suspend transition, the ISP1181B sets bit SUSPND in
2. When the firmware detects a suspend condition, it must prepare all system
3. In the interrupt service routine, the firmware must check the current status of the
4. To meet the suspend current requirements for a bus-powered device, the internal
5. When the firmware has set and cleared bit GOSUSP in the Mode register, the
the Interrupt register. This will generate an interrupt if bit IESUSP in the Interrupt
Enable register is set.
components for the suspend state:
USB bus. When bit BUSTATUS in the Interrupt register is logic 0, the USB bus
has left the suspend mode and the process must be aborted. Otherwise, the next
step can be executed.
clocks must be switched off by clearing bit CLKRUN in the Hardware
Configuration register.
ISP1181B enters the suspend state. In powered-off application, the ISP1181B
asserts output SUSPEND and switches off the internal clocks after 2 ms.
a. All signals connected to the ISP1181B must enter appropriate states to meet
b. All input pins of the ISP1181B must have a CMOS LOW or HIGH level.
the power consumption requirements of the suspend state.
shows a typical timing diagram.
Rev. 02 — 07 December 2004
Full-speed USB peripheral controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1181B
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