A3P125-QNG132 MICROSEMI, A3P125-QNG132 Datasheet - Page 73

• Manufacturer Part Number: A3P125-QNG132
• Manufacturer: MICROSEMI

Specifications of A3P125-QNG132

• Lead Free Status / Rohs Status: Compliant

Figure 2-19 • Output Enable Register Timing Diagram
Table 2-96 • Output Enable Register Propagation Delays
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
D_Enable
Enable
Preset
EOUT
CLK
Clear
OECLKQ
OESUD
OEHD
OESUE
OEHE
OECLR2Q
OEPRE2Q
OEREMCLR
OERECCLR
OEREMPRE
OERECPRE
OEWCLR
OEWPRE
OECKMPWH
OECKMPWL
For specific junction temperature and voltage supply levels, refer to
Output Enable Register
Timing Characteristics
Automotive-Case Conditions: T
Clock-to-Q of the Output Enable Register
Data Setup Time for the Output Enable Register
Data Hold Time for the Output Enable Register
Enable Setup Time for the Output Enable Register
Enable Hold Time for the Output Enable Register
Asynchronous Clear-to-Q of the Output Enable Register
Asynchronous Preset-to-Q of the Output Enable Register
Asynchronous Clear Removal Time for the Output Enable Register
Asynchronous Clear Recovery Time for the Output Enable Register
Asynchronous Preset Removal Time for the Output Enable Register
Asynchronous Preset Recovery Time for the Output Enable Register
Asynchronous Clear Minimum Pulse Width for the Output Enable Register
Asynchronous Preset Minimum Pulse Width for the Output Enable Register
Clock Minimum Pulse Width High for the Output Enable Register
Clock Minimum Pulse Width Low for the Output Enable Register
50%
50%
t
OESUE
1
t
OEHE
50%
t
OESUD
50%
t
OECLKQ
0
t
50%
OEHD
50%
50%
t
OEWPRE
J
Description
t
= 135°C, Worst-Case VCC = 1.425 V
OEPRE2Q
50%
50%
t
50%
OERECPRE
R e v i s i o n 1
50%
t
t
OEWCLR
OECLR2Q
50%
50%
Table 2-5 on page 2-5
t
50%
OERECCLR
Automotive ProASIC3 Flash Family FPGAs
50%
t
OECKMPWH
t
OEREMPRE
50%
for derating values.
0.54 0.64
0.38 0.45
0.00 0.00
0.53 0.62
0.00 0.00
0.81 0.95
0.81 0.95
0.00 0.00
0.27 0.32
0.00 0.00
0.27 0.32
0.25 0.30
0.41 0.48
0.37 0.43
0.25 0.30
50%
t
–1
OECKMPWL
Std. Units
t
OEREMCLR
50%
50%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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