SC16C850VIBS,128 NXP Semiconductors, SC16C850VIBS,128 Datasheet - Page 30

IC UART SINGLE W/FIFO 32-HVQFN

SC16C850VIBS,128

Manufacturer Part Number
SC16C850VIBS,128
Description
IC UART SINGLE W/FIFO 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C850VIBS,128

Features
Programmable
Number Of Channels
1, UART
Fifo's
128 Byte
Protocol
RS485
Voltage - Supply
1.8V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Mounting
Surface Mount
Pin Count
32
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935283087128
SC16C850VIBS-F
SC16C850VIBS-F
NXP Semiconductors
SC16C850V
Product data sheet
7.15 Transmit Interrupt Level register (TXINTLVL)
7.16 Receive Interrupt Level register (RXINTLVL)
Table 24.
[1]
This 8-bit register is used store the transmit FIFO trigger levels used for interrupt
generation. Trigger levels from 1 to 128 can be programmed with a granularity of 1.
Table 25
Table 25.
[1]
This 8-bit register is used store the receive FIFO trigger levels used for interrupt
generation. Trigger levels from 1 to 128 can be programmed with a granularity of 1.
Table 26
Table 26.
Cont-3
0
1
0
1
X
X
X
1
0
1
Bit
7:0
Bit
7:0
When using a software flow control the Xon/Xoff characters cannot be used for data transfer.
For 32-byte FIFO mode, refer to
TXINTLVL[7:0]
RXINTLVL[7:0]
Symbol
Symbol
shows trigger level register bit settings.
shows trigger level register bit settings.
Cont-2
0
0
1
1
X
X
X
0
1
1
Software flow control functions
TXINTLVL register bits description
RXINTLVL register bits description
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
All information provided in this document is subject to legal disclaimers.
Cont-1
X
X
X
X
0
1
0
1
1
1
Rev. 5 — 19 January 2011
This register stores the programmable transmit interrupt trigger levels for
This register stores the programmable receive interrupt trigger levels for
Description
128-byte FIFO mode.
Description
128-byte FIFO mode.
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
Cont-0
X
X
X
X
0
0
1
1
1
1
Section 7.3 “FIFO Control Register
TX, RX software flow controls
No transmit flow control
Transmit Xon1/Xoff1
Transmit Xon2/Xoff2
Transmit Xon1 and Xon2/Xoff1 and Xoff2
No receive flow control
Receiver compares Xon1/Xoff1
Receiver compares Xon2/Xoff2
Transmit Xon1/Xoff1
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2
Transmit Xon2/Xoff2
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2
Transmit Xon1 and Xon2, Xoff1 and Xoff2
Receiver compares Xon1 and Xon2, Xoff1 and Xoff2
[1]
[1]
[1]
(FCR)”.
SC16C850V
© NXP B.V. 2011. All rights reserved.
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