TDA8932BTW/N2,118 NXP Semiconductors, TDA8932BTW/N2,118 Datasheet - Page 35

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TDA8932BTW/N2,118

Manufacturer Part Number
TDA8932BTW/N2,118
Description
IC AMP AUDIO CLASS D 32HTSSOP
Manufacturer
NXP Semiconductors
Type
Class Dr
Datasheets

Specifications of TDA8932BTW/N2,118

Output Type
1-Channel (Mono) or 2-Channel (Stereo)
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Max Output Power X Channels @ Load
55W x 1 @ 8 Ohm; 26.5W x 2 @ 4 Ohm
Voltage - Supply
10 V ~ 36 V, ±5 V ~ 18 V
Features
Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
Mounting Type
Surface Mount
Product
Class-D
Output Power
55 W
Available Set Gain
36 dB
Common Mode Rejection Ratio (min)
75 dB
Thd Plus Noise
0.007 %
Operating Supply Voltage
22 V
Supply Current
0.145 mA
Maximum Power Dissipation
5000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Audio Load Resistance
8 Ohms
Dual Supply Voltage
+/- 11 V
Input Signal Type
Differential
Minimum Operating Temperature
- 40 C
Output Signal Type
Differential, Single
Supply Type
Single or Dual
Supply Voltage (max)
36 V
Supply Voltage (min)
10 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935283479118
NXP Semiconductors
Table 11.
T
positive currents flow in the IC; typical values are given at V
[1]
[2]
UJA1079_2
Product data sheet
Symbol
δ2
δ3
δ4
t
t
t
t
t
Wake bias output; pin WBIAS
t
t
Watchdog
t
t
Oscillator
f
PD(RX)r
PD(RX)f
PD(RX)sym
wake(busdom)min
to(dom)TXDL
WBIASL
cy
trig(wd)1
trig(wd)2
osc
vj
=
Bus load conditions are: C
δ1 δ3
40 °C to +150
,
=
Dynamic characteristics
t
-------------------------------
bus rec
2 t
(
Parameter
duty cycle 2
duty cycle 3
duty cycle 4
rising receiver propagation
delay
falling receiver propagation
delay
receiver propagation delay
symmetry
minimum bus dominant
wake-up time
TXDL dominant time-out time LIN online mode; V
WBIAS LOW time
cycle time
watchdog trigger time 1
watchdog trigger time 2
oscillator frequency
×
°
) min
bit
C; V
(
)
BAT
.
L
= 1 nF and R
= 4.5 V to 28 V; V
…continued
L
= 1 kΩ; C
All information provided in this document is subject to legal disclaimers.
BAT
Conditions
V
V
V
V
V
V
V
V
t
LSC = 1
V
V
t
LSC = 1
V
V
V
V
V
V
V
C
V
C
V
C
WBC = 1
WBC = 0
Normal mode
watchdog Window mode only
Normal, Standby and Sleep modes
watchdog Window mode only
bit
bit
th(rec)RX(min)
th(dom)RX(min)
BAT
th(rec)RX(min)
th(dom)RX(min)
BAT
th(rec)RX(max)
th(dom)RX(max)
th(rec)RX(max)
th(dom)RX(max)
th(rec)RX(min)
th(dom)RX(min)
BAT
th(rec)RX(min)
th(dom)RX(min)
BAT
BAT
BAT
BAT
L
RXDL
RXDL
RXDL
> V
Rev. 02 — 27 May 2010
= 6.8 nF and R
= 96 μs; V
= 96 μs; V
= 7.6 V to 18 V; LSC = 0
= 6.1 V to 7.6 V; LSC = 0
= 7.6 V to 18 V; LSC = 1
= 6.1 V to 7.6 V; LSC = 1
= 5.5 V to 18 V; R
= 5.5 V to 18 V; R
= 5.5 V to 18 V; R
V1
= 20 pF
= 20 pF
= 20 pF
; R
BAT
LIN
= 0.422V
= 0.41V
= 0.389V
= 0.378V
BAT
BAT
= 500
= 14 V; unless otherwise specified.
= 0.778V
= 0.797V
= 0.284V
= 0.275V
= 0.251V
= 0.242V
= 0.616V
= 0.630V
L
= 7 V to 18 V
= 5.5 V to 7 V
= 660 Ω; C
TXDL
Ω
BAT
; all voltages are defined with respect to ground;
BAT
BAT
BAT
BAT
BAT
RXDL
RXDL
RXDL
BAT;
BAT
BAT;
BAT
BAT
BAT
= 0 V
; t
; t
t
t
L
bit
bit
bit
bit
= 2.4 kΩ
= 2.4 kΩ
= 2.4 kΩ
= 10 nF and R
= 50 μs
= 96 μs
= 50 μs
= 96 μs
[2]
[3]
[2]
[3]
[1]
[2]
[1]
[2]
[2]
[3]
[2]
[3]
[4]
[5]
[7]
L
LIN core system basis chip
= 500 Ω.
Min
-
-
0.417
0.417
-
-
-
-
−2
28
20
227
58.1
14.5
0.45 ×
NWP
0.9 ×
NWP
460.8
[6]
[6]
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
512
UJA1079
© NXP B.V. 2010. All rights reserved.
Max
0.581
0.581
-
-
0.590
0.590
6
6
+2
104
80
278
71.2
17.8
0.555 ×
NWP
1.11 ×
NWP
563.2
[6]
[6]
35 of 45
Unit
μs
μs
μs
μs
ms
μs
ms
ms
ms
ms
kHz

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