LM49352RLX/NOPB National Semiconductor, LM49352RLX/NOPB Datasheet - Page 36

IC AMP AUDIO MONO D1.4W 36USMD

LM49352RLX/NOPB

Manufacturer Part Number
LM49352RLX/NOPB
Description
IC AMP AUDIO MONO D1.4W 36USMD
Manufacturer
National Semiconductor
Series
Boomer®, PowerWise®r
Type
Class Dr
Datasheet

Specifications of LM49352RLX/NOPB

Output Type
1-Channel (Mono) with Mono and Stereo Headphones
Max Output Power X Channels @ Load
1.4W x 1 @ 8 Ohm; 65mW x 2 @ 32 Ohm
Features
Depop, Differential Inputs, I²C, I²S, Microphone, Shutdown, Volume Control
Mounting Type
Surface Mount
Package / Case
36-MicroSMDxt
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Other names
LM49352RLX

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM49352RLX/NOPB
Manufacturer:
CYPRESS
Quantity:
562
www.national.com
14.0 Basic PMC Setup Register
This register is used to control the LM49352's Basic Power Management Setup:
1. If the PMC is set to operate from one of the audio ports then it will wait for the port to be enabled or the relevant override bit to
be set, forcing the port clock input to enable.
Bits
0
1
2
3
4
5
6
7
PORT1_CLK_OVR
PORT2_CLK_OVR
CHIP_ENABLE
CHIP_ACTIVE
PLL_P2ENB
MCLK_OVR
OSC_ENB
PLL_ENB
Field
When this bit is set the power management will enable the MCLK I/O or internal
oscillator
bias points. When this bit is cleared the PMC will bring the analog down gently and disable
the MCLK or oscillator.
This enables the PLL.
This enables the P2 output of the PLL.
This enables the internal 300kHz Oscillator. For analog only chip modes, the oscillator can
be used instead of an external system clock to drive the chip's power management (PMC).
This forces the MCLK input to enable, regardless of requirement. If set, the audio ports and
digital mixer can be activated even if the chip is in shutdown mode. This assumes that MCLK
is selected as the PMC clock source (reg 0x01h) and that there is an active clock signal
driving the MCLK pin. Setting this bit reduces power consumption, by allowing audio ports
and digital mixer to operate while the analog sections of the chip are powered down.
This forces the clock input of Audio Port 1 input to enable, regardless of other port settings.
This forces the clock input of Audio Port 2 input to enable, regardless of other port settings.
This bit is used to readback the enable status of the chip.
PORT1_CLK_OVR
PORT2_CLK_OVR
TABLE 3. PMC_SETUP (0x00h)
CHIP _ENABLE
OSC_ENABLE
1
PLL_ENABLE
PLL_P2ENB
. It will then use this clock to sequence the enabling of the analog references and
MCLK_OVR
0
1
0
1
0
1
0
1
0
1
0
1
0
1
36
Description
PORT_CLK input forced on
PORT_CLK input forced on
I/O control is automatic
I/O control is automatic
I/O control is automatic
MCLK input forced on.
Oscillator Status
PLL P2 Status
Turn Chip Off
Turn Chip On
Oscillator Off
Oscillator On
Chip Status
PLL Status
PLL P2 Off
PLL P2 On
Comment
Comment
Comment
PLL Off
PLL On

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