LM49352RLX/NOPB National Semiconductor, LM49352RLX/NOPB Datasheet - Page 53

• Manufacturer Part Number: LM49352RLX/NOPB
• Description: IC AMP AUDIO MONO D1.4W 36USMD
• Manufacturer: National Semiconductor
• Series: Boomer®, PowerWise®r
• Type: Class Dr

Specifications of LM49352RLX/NOPB

• Output Type: 1-Channel (Mono) with Mono and Stereo Headphones
• Max Output Power X Channels @ Load: 1.4W x 1 @ 8 Ohm; 65mW x 2 @ 32 Ohm
• Features: Depop, Differential Inputs, I²C, I²S, Microphone, Shutdown, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 36-MicroSMDxt
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Other names: LM49352RLX

20.0 ADC Control Registers
This register is used to control the LM49352's ADC:
Bits
Bits
7:0
6:4
0
1
2
3
7
ADC_DSP_ONLY
ADC_CLK_DIV
ADC_CLK_SEL
MUTE_R
MUTE_L
MONO
Field
Field
OSR
This programs the half cycle divider that preceeds the ADC. The input of this divider should be
around 12MHz. The default of this divider is 0x00.
Program this divider with the division you want, multiplied by 2, and subtract 1.
This sets mono or stereo operation of the ADC.
This sets the oversampling ratio of the ADC.
If set, a digital mute is applied to the Left (or mono) ADC output.
If set, a digital mute is applied to the Right ADC output.
This selects the source of the ADC clock domain, ADC_SOURCE_CLK.
If set, the ADC's analog circuitry is disabled to reduce power consumption, however, ADC DSP
functionality is maintained. This can be used to perform asynchronous resampling between audio
rates of a common family. Setting this bit is also useful whenever applying Automatic Level Control
(ALC) to an analog only audio path.
MONO
OSR
0
1
0
1
TABLE 26. ADC_CLK_DIV (0x21h)
TABLE 25. ADC Basic (0x20h)
ADC_CLK_SEL
ADC_CLK_DIV
00000000
00000001
00000010
00000011
11111101
11111110
11111111
000
001
010
011
100
—
Oversampling Ratio
Mono Voice (Right ADC channel disabled, Left ADC channel active)
Stereo Audio ADC
53
128
128
Description
Description
ADC Operation
Mono Voice ADC Oversampling Ratio
Stereo Audio
PORT1_RX_CLK
PORT2_RX_CLK
PLL_OUTPUT1
PLL_OUTPUT2
Divides by
Source
MCLK
127.5
125
128
127
128
1.5
—
1
1
2
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