LM49352RLX/NOPB National Semiconductor, LM49352RLX/NOPB Datasheet - Page 55

• Manufacturer Part Number: LM49352RLX/NOPB
• Description: IC AMP AUDIO MONO D1.4W 36USMD
• Manufacturer: National Semiconductor
• Series: Boomer®, PowerWise®r
• Type: Class Dr

Specifications of LM49352RLX/NOPB

• Output Type: 1-Channel (Mono) with Mono and Stereo Headphones
• Max Output Power X Channels @ Load: 1.4W x 1 @ 8 Ohm; 65mW x 2 @ 32 Ohm
• Features: Depop, Differential Inputs, I²C, I²S, Microphone, Shutdown, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 36-MicroSMDxt
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Other names: LM49352RLX

21.0 DAC Control Registers
This register is used to control the LM49352's DAC:
Bits
Bits
1:0
6:4
7:0
2
3
7
DAC_CLK_SEL
DAC_CLK_DIV
DSP_ONLY
MUTE_R
MUTE_L
MODE
Field
Field
This programs the over sampling ratio of the stereo DAC.
This digitally mutes the Left DAC output.
This digitally mutes the Right DAC output.
This selects the source of the DAC clock domain, DAC_SOURCE_CLK.
If set, the DAC's analog circuitry is disabled to reduce power consumption, however DAC DSP
functionality is maintained. This can be used to perform asyncronous resampling between audio rates
of a common family.
This programs the half cycle divider that precedes the DAC. The input of this divider should be
around 12MHz. The default of this divider is 0x03 which gives a division by 2.
Program this divider with the division you want, multiplied by 2, and subtract 1.
DAC_CLK_SEL
000
001
010
011
100
TABLE 29. DAC_CLK_DIV (0x31h)
TABLE 28. DAC Basic (0x30h)
DAC_CLK_DIV
00000000
00000001
00000010
00000011
11111101
11111110
11111111
MODE
—
00
01
10
11
55
Description
Description
PORT1_RX_CLK
PORT2_RX_CLK
PLL_OUTPUT1
PLL_OUTPUT2
Source
MCLK
DAC Oversampling Ratio
2 (Default)
Divides by
64 (Default)
127.5
RSVD
127
128
1.5
—
125
128
1
1
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