LM49352RLX/NOPB National Semiconductor, LM49352RLX/NOPB Datasheet - Page 37
LM49352RLX/NOPB
Manufacturer Part Number
LM49352RLX/NOPB
Description
IC AMP AUDIO MONO D1.4W 36USMD
Manufacturer
National Semiconductor
Series
Boomer®, PowerWise®r
Type
Class Dr
Datasheet
1.LM49352RLNOPB.pdf
(110 pages)
Specifications of LM49352RLX/NOPB
Output Type
1-Channel (Mono) with Mono and Stereo Headphones
Max Output Power X Channels @ Load
1.4W x 1 @ 8 Ohm; 65mW x 2 @ 32 Ohm
Features
Depop, Differential Inputs, I²C, I²S, Microphone, Shutdown, Volume Control
Mounting Type
Surface Mount
Package / Case
36-MicroSMDxt
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Other names
LM49352RLX
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LM49352RLX/NOPB
Manufacturer:
CYPRESS
Quantity:
562
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15.0 PMC Clocks Register
This register is used to control the LM49352's Basic Power Management Clock:
16.0 PMC Clock Divide Register
This register is used to control the LM49352's Power Management Circuit Clock Divider:
Bits
Bits
1:0
7:0
PMC_CLK_SEL
PMC_CLK_DIV
Field
Field
This selects the source of the PMC input clock.
This programs the half cycle divider that precedes the PMC. The PMC should run from a
300kHz clock. The default of this divider is 0x50h (divide by 40.5) to get a
clock from a 12MHz or 12.288MHz MCLK.
Program this divider with the required division, multiplied by 2, and subtract 1.
TABLE 4. PMC_SETUP (0x01h)
TABLE 5. PMC_SETUP (0x02h)
PMC_CLK_SEL
PMC_CLK_DIV
00000000
00000001
00000010
00000011
00000100
00000101
11111101
11111110
11111111
00
01
10
11
—
37
Description
Description
MCLK (Default divide is 40.5)
Internal 300kHz Oscillator
PMC Input Clock Source
DAC SOURCE CLOCK
ADC SOURCE CLOCK
Divide by
127.5
126
128
1.5
2.5
—
1
1
2
3
≈
300kHz PMC
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