ATmega165P Atmel Corporation, ATmega165P Datasheet - Page 241

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ATmega165P

Manufacturer Part Number
ATmega165P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega165P

Flash (kbytes)
16 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8019K–AVR–11/10
Note:
If the ADC is not to be used during scan, the recommended input values from
page 239
scan. Switch-Cap based differential amplifier requires fast operation and accurate timing which
is difficult to obtain when used in a scan chain. Details concerning operations of the differential
amplifier is therefore not provided.
The AVR ADC is based on the analog circuitry shown in
sive approximation algorithm implemented in the digital logic. When used in Boundary-scan, the
problem is usually to ensure that an applied analog voltage is measured within some limits. This
can easily be done without running a successive approximation algorithm: apply the lower limit
on the digital DAC[9:0] lines, make sure the output from the comparator is low, then apply the
upper limit on the digital DAC[9:0] lines, and verify the output from the comparator to be high.
The ADC need not be used for pure connectivity testing, since all analog inputs are shared with
a digital port pin as well.
When using the ADC, remember the following:
• The port pin for the ADC channel in use must be configured to be an input with pull-up disabled
• In Normal mode, a dummy conversion (consisting of 10 comparisons) is performed when
• The DAC values must be stable at the midpoint value 0x200 when having the HOLD signal low
As an example, consider the task of verifying a 1.5V ±5% input signal at ADC channel 3 when
the power supply is 5.0V and AREF is externally connected to V
The recommended values from
in the algorithm in
are shown. The column “Actions” describes what JTAG instruction to be used before filling the
Boundary-scan Register with the succeeding columns. The verification should be done on the
data scanned out when scanning in the data on the same row in the table.
to avoid signal contention.
enabling the ADC. The user is advised to wait at least 200 ns after enabling the ADC before
controlling/observing any ADC signal, or perform a dummy conversion before using the first
result.
(Sample mode).
1. Incorrect setting of the switches in
should be used. The user is recommended not to use the Differential Amplifier during
may damage the part. There are several input choices to the S&H circuitry on the negative
input of the output comparator in
selected from either one ADC pin, Bandgap reference source, or Ground.
The lower limit is:
The upper limit is:
Table 23-4 on page
Table 23-3 on page 239
1024 1.5V 0,95 5V
1024 1.5V 1.05 5V
242. Only the DAC and port pin values of the Scan Chain
Figure 23-9 on page
Figure 23-9 on page 238
Figure 23-9 on page 238
are used unless other values are given
=
=
238. Make sure only one path is
291
323
CC
=
=
will make signal contention and
.
0x123
0x143
ATmega165P
Table 23-3 on
with a succes-
241

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