ADAU1701JSTZ Analog Devices Inc, ADAU1701JSTZ Datasheet - Page 29

IC AUDIO PROC 2ADC/4DAC 48-LQFP

ADAU1701JSTZ

Manufacturer Part Number
ADAU1701JSTZ
Description
IC AUDIO PROC 2ADC/4DAC 48-LQFP
Manufacturer
Analog Devices Inc
Series
SigmaDSP®r
Type
Audio Processorr
Datasheets

Specifications of ADAU1701JSTZ

Design Resources
Analog Audio Input, Class-D Output with ADAU1701, SSM2306, and ADP3336 (CN0162)
Applications
Automotive, Monitors, MP3
Mounting Type
Surface Mount
Package / Case
48-LQFP
Audio Control Type
Digital
Control Interface
I2C, Serial
Supply Voltage Range
1.8V, 3.3V
Operating Temperature Range
0°C To +70°C
Audio Ic Case Style
LQFP
No. Of Pins
48
Svhc
No SVHC
Control / Process Application
MP3 Player Speaker Docks, Automotive Head Units, Studio Monitors
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADAU1701MINIZ - BOARD EVAL SIGMADSP AUD ADAU1701EVAL-ADAU1701EBZ - BOARD EVAL FOR ADAU1701
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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The writeback function writes data from the ADAU1701
interface registers to the second page of the self-boot EEPROM,
Address 32 to Address 63. Starting at EEPROM Address 26
(so that the interface register data begins at Address 32), the
EEPROM should be programmed with six bytes—the message
byte (0x01), two length bytes, the chip address (0x00), and the
2-byte subaddress for the interface registers (0x08 0x00). There
must be a message to the DSP core control register to enable
writing to the interface registers prior to the interface register
data in the EEPROM. This should be stored in EEPROM
Address 0. No-op messages (0x03) can be used in between
messages to ensure that these conditions are met.
Table 20. EEPROM Message Types
Message ID
0x00
0x01
0x02
0x03
0x04
0x05
0x06
WRITE
WRITE
0x01
0x03
0x03
0x03
0x00
0x00
0x00
0x00
0x01
0x00
0x00
NO-OP BYTES
0x001
0x00
0x03
0x03
0x03
0x00
0x00
0x00
0x00
0x00
0x00
Message Type
End
Write
Delay
No operation executed
Set multiple writeback
Set WB to falling edge sensitive
End and wait for writeback
LENGTH
LENGTH
WRITE
0x05
0x03
0x03
0x01
0x00
0x00
0x00
0x00
0x61
0x01
0x00
PROGRAM RAM DATA (CONTINUES FOR 332 MORE BYTES)
Figure 28. EEPROM Data Example
ADDRESS
ADDRESS
DEVICE
INTERFACE REGISTER DATA
INTERFACE REGISTER DATA
INTERFACE REGISTER DATA
INTERFACE REGISTER DATA
DEVICE
0x00
0x03
0x03
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
PROGRAM RAM DATA
Rev. A | Page 29 of 56
NO-OP BYTES
NO-OP BYTES
LENGTH
CORE CONTROL REGISTER
PROGRAM RAM ADDRESS
0x08
0x03
0x03
0x23
0x00
0x00
0x00
0x00
0x04
0x00
0x01
The ADAU1701 writes to EEPROM Chip Address 0xA0. The
LSBs of the addresses of some EEPROMs are pin configurable; in
most cases, these pins should be tied low to set the address to 0xA0.
The maximum number of bytes that is written back from the
ADAU1701 is 35 (eight 4-byte interface registers plus three
bytes of EEPROM-addressing overhead). With SCL running at
384 kHz, the writeback operation takes approximately 73 μs to
complete after being triggered. Ensure that sufficient power is
available to the system to allow enough time for a writeback to
complete, especially if the WB signal is triggered from a falling
power supply voltage.
Following Bytes
None
Two bytes indicating message length followed by appropriate
number of data bytes
Two bytes for delay
None
None
None
None
ADDRESS
ADDRESS
DEVICE
0x1C
0x03
0x03
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
CORE CONTROL REGISTER
INTERFACE REGISTER
0xE8
0x00
0x03
0x03
0x08
0x00
0x00
0x00
0x00
0x00
0x08
PROGRAM RAM DATA
ADDRESS
DATA
0x40
0x03
0x03
0x00
0x00
0x00
0x00
0x00
0x00
0x01
0x00
ADAU1701

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