ADAU1701JSTZ Analog Devices Inc, ADAU1701JSTZ Datasheet - Page 43

IC AUDIO PROC 2ADC/4DAC 48-LQFP

ADAU1701JSTZ

Manufacturer Part Number
ADAU1701JSTZ
Description
IC AUDIO PROC 2ADC/4DAC 48-LQFP
Manufacturer
Analog Devices Inc
Series
SigmaDSP®r
Type
Audio Processorr
Datasheets

Specifications of ADAU1701JSTZ

Design Resources
Analog Audio Input, Class-D Output with ADAU1701, SSM2306, and ADP3336 (CN0162)
Applications
Automotive, Monitors, MP3
Mounting Type
Surface Mount
Package / Case
48-LQFP
Audio Control Type
Digital
Control Interface
I2C, Serial
Supply Voltage Range
1.8V, 3.3V
Operating Temperature Range
0°C To +70°C
Audio Ic Case Style
LQFP
No. Of Pins
48
Svhc
No SVHC
Control / Process Application
MP3 Player Speaker Docks, Automotive Head Units, Studio Monitors
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADAU1701MINIZ - BOARD EVAL SIGMADSP AUD ADAU1701EVAL-ADAU1701EBZ - BOARD EVAL FOR ADAU1701
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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2080 TO 2081 (0x0820 TO 0x0821)—
MULTIPURPOSE PIN CONFIGURATION REGISTERS
Each multipurpose pin can be set to different functions from
these registers (2080 to 2081). The two 3-byte registers are
broken up into 12 4-bit (nibble) sections that each control a
Table 52. Register 2080 Bit Map
D15
MP33
Table 53. Register 2081 Bit Map
D15
MP93
Table 54.
Bit Name
MPx[3:0]
D14
MP92
D14
MP32
D13
MP91
D13
MP31
Set the function of each multipurpose pin.
Description
MPx[3:0]
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
D12
MP90
D12
MP30
D11
MP83
D11
MP23
D10
MP82
D10
MP22
Auxiliary ADC input (see Table 63)
Reserved
Reserved
Serial data port—inverted (see Table 65)
Open-collector output—inverted
GPIO output—inverted
GPIO input, no debounce—inverted
GPIO input, debounced—inverted
N/A
Reserved
Reserved
Serial data port (see Table 65)
Open-collector output
GPIO output
GPIO input, no debounce
GPIO input, debounced
Setting
D9
MP81
MP21
D9
D8
MP80
D8
MP20
Rev. A | Page 43 of 56
D23
D7
MP113
MP73
D23
D7
MP53
MP13
D6
D22
MP112
MP72
D22
D6
MP52
MP12
different MP pin. Table 54 lists the function of each nibble
setting within the MP pin configuration registers. The MSB of
each pin’s 4-bit configuration inverts the input to or output
from the pin. The internal pull-up resistor (approximately
10 kΩ) of each MP pin is enabled when it is set as a digital input
(either a GPIO input or a serial data port input).
D21
D5
MP111
MP71
D21
D5
MP51
MP11
D20
D4
MP110
MP70
D20
D4
MP50
MP10
D19
D3
MP103
MP63
D19
D3
MP43
MP03
D2
D18
MP102
MP62
D18
D2
MP42
MP02
D17
D1
MP101
MP61
D1
D17
MP41
MP01
ADAU1701
D16
D0
MP40
MP00
D16
D0
MP100
MP60
Default
0x00
0x0000
Default
0x00
0x0000

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