STM32F101VD STMicroelectronics, STM32F101VD Datasheet - Page 15

• Manufacturer Part Number: STM32F101VD
• Description: Mainstream Access line, ARM Cortex-M3 MCU with 384 Kbytes Flash, 36 MHz CPU
• Manufacturer: STMicroelectronics

Specifications of STM32F101VD

• Core: ARM 32-bit Cortex™-M3 CPU
• Conversion Range: 0 to 3.6 V
• Peripherals Supported: timers, ADC, DAC, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter

STM32F101xC, STM32F101xD, STM32F101xE
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
The ARM Cortex™-M3 32-bit RISC processor features exceptional code-efficiency,
delivering the high-performance expected from an ARM core in the memory size usually
associated with 8- and 16-bit devices.
The STM32F101xC, STM32F101xD and STM32F101xE access line family having an
embedded ARM core, is therefore compatible with all ARM tools and software.
Figure 1
Embedded Flash memory
256 to 512 Kbytes of embedded Flash are available for storing programs and data.
CRC (cyclic redundancy check) calculation unit
The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit
data word and a fixed generator polynomial.
Among other applications, CRC-based techniques are used to verify data transmission or
storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of
verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of
the software during runtime, to be compared with a reference signature generated at link-
time and stored at a given memory location.
Embedded SRAM
Up to 48 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait
states.
FSMC (flexible static memory controller)
The FSMC is embedded in the STM32F101xC, STM32F101xD and STM32F101xE access
line family. It has four Chip Select outputs supporting the following modes: PC
Card/Compact Flash, SRAM, PSRAM, NOR and NAND.
Functionality overview:
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LCD parallel interface
The FSMC can be configured to interface seamlessly with most graphic LCD controllers. It
supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to
specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost-
effective graphic applications using LCD modules with embedded controllers or high-
performance solutions using external controllers with dedicated acceleration.
The three FSMC interrupt lines are ORed in order to be connected to the NVIC
Write FIFO
Code execution from external memory except for NAND Flash and PC Card
The targeted frequency is HCLK/2, so external access is at 18 MHz when HCLK is at
36 MHz
shows the general block diagram of the device family.
Doc ID 14610 Rev 8
Description
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