TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 123

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

Up
counter
Comparator
timing
Comparator output
(Match detect)
<TA1RUN>
TA01RUN
UC1 clear
TA1OUT
Bit7 to 2
INTTA1
TA01RUN
TA01MOD
TA1REG
TA1FFCR
PBCR
PBFC
TA01RUN
X: Don’t care, − : No change
TA1FF
Example: To output a 1.2 µ s square wave pulse from the TA1OUT pin at fc = 36MHz, use the following procedure to
Bit1
Bit0
φ
T1
b.
make the appropriate register settings. This example uses TMRA1; however, either TMRA0 or TMRA1 may
be used.
Generating a 50% duty ratio square wave pulse
status output via the timer output pin (TA1OUT).
Figure 3.7.10 Square Wave Output Timing Chart (50% duty)
0
← –
← 0
← 0
← X
← X
← X
← –
The state of the timer flip-flop (TA1FF) is inverted at constant intervals and its
7
* Clock state
6
X
0
0
X
–
–
X
1
5
X
X
0
X
–
–
X
4
X
X
0
X
–
–
X
2
3
–
0
0
1
–
–
–
–
0
1
2
1
0
X
X
3
91C820A-121
1
0
1
1
–
1
1
1
0
0
–
–
1
1
–
–
–
0.6 µs at fc = 36 MHz
1
System clock:
Clock gear:
Prescaler clock: f
Stop TMRA1 and clear it to 0.
Select 8-bit timer mode and select φ T1 (0.2 µ s at fc = 36
MHz) as the input clock.
Set the timer register to 1.2 µ s ÷ φ T1 ÷ 2 = 3.
Clear TA1FF to 0 and set it to invert on the match detects
signal from TMRA1.
Set PB1 to function as the TA1OUT pin.
Start TMRA1 counting.
2
3
0
High frequency (fc)
1 (fc)
FPH
1
2
3
TMP91C820A
0
2008-02-20