TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 248

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

Figure 3.14.3 Memory Mapping Image for SRAM as Display RAM (Only A and B area)
Display memory setting
start address
•
Display memory mapping and panning function
A and B area can be vertical panned by changing row address. While C area
can be vertical and horizontal panned by changing row and column address.
cannot be input continuously even if you don’t use the panning function. One
row address of display RAM corresponds to 1st line of display panel. Now
display data of 2nd line cannot be set within the 1st row address of display
RAM even if the necessary data for the size you want to display do not fill the
capacity of 1st row address of display RAM. Adding the one line to display
panel is equal to adding one address to row address of display RAM.
RAM without address multiplex. When you use SDRAM as display RAM, you
can select the size for display RAM capacity of one line. But in case of using
SRAM, display RAM capacity of one line is fixed to 512 bytes.
LCDC can change the panel window if only you change each start address of
An important thing is that display data from one line to the next line,
And another important thing is, this limitation is also for SRAM as display
Reserved area (Display 3rd line)
Display panel of 1st line
memory area
Display panel of 2nd line
memory area
Display panel of 3rd line
memory area
91C820A-246
16-bit bus width
(Display 2nd line)
Reserved area
Reserved area
(Display 1st line)
Memory area for display 1st line
(When using SRAM, this area is
fixed to 512 bytes.)
Memory area for display 2nd line
(When using SRAM, this area is
fixed to 512 bytes.)
Memory area for display 3rd line
(When using SRAM, this area is
fixed to 512 bytes.)
TMP91C820A
2008-02-20