TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 31

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

(4) Runaway provision with SFR protection register
prevents that it is it in the state which is fetch impossibility by stopping of clock,
memory control register (CS/WAIT controller, MMU) is changed.
by setting up a double key to EMCCR1 and EMCCR2 register.
with protection on state.
(Purpose)
Provision in runaway of program by noise mixing.
Write operation to specified SFR is prohibited so that provision program in runaway
And error handling in runaway becomes easy by INTP0 interruption.
Specified SFR list
(Operation explanation)
Execute and release of protection (Write operation to specified SFR) become possible
A state of protection can be confirmed by reading EMCCR0<PROTECT>.
By reset, protection becomes OFF.
And INTP0 interruption occurs when write operation to specified SFR was executed
1.
2.
3.
4.
(Double key)
CS/WAIT controller
MMU
Clock gear
DFM
B0CS, B1CS, B2CS, B3CS, BEXCS,
MSAR0, MSAR1, MSAR2, MSAR3,
MAMR0, MAMR1, MAMR2, MAMR3
LOCAL0/1/2/3
SYSCR0, SYSCR1, SYSCR2, EMCCR0, EMCCR3
DFMCR0/1
1st-KEY: Succession writes in 5AH at EMCCR1 and A5H at EMCCR2
2nd-KEY: Succession writes in A5H at EMCCR1 and 5AH at EMCCR2
91C820A-29
TMP91C820A
2008-02-20