TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 236

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.14 LCD Controller (LCDC)
LCD Driver LSI.
before start SR type.
data memory. After that LCDC transmits data of volume of LCD size to external LCD driver
through exclusive data bus (LD7:0). At this time, control signals connected LCD driver output
specified waveform synchronizes with data transmission.
(D1BSCP etc.). Therefore control of data transmission numbers corresponding to LCD size is
controlled by software. At this time, LCD controller output only chip enable signal, and
transmission data output from data bus (D7:0).
The TMP91C820A incorporates two types liquid crystal display driving circuit for controlling
Set the mode of operation, start address of display data save memory and LCD size to SFR
After started SR type LCDC outputs bus release request to CPU and read data from display
After finish display data reading, LCDC cancels the bus release request and CPU will restart.
As the display RAM, SDRAM burst mode can be used in TMP91C820A.
Data transmission to LCD driver is executed by move instruction of CPU.
After setting mode of operation to SFR, when moves instruction of CPU is executed
LCDC outputs chip select signal to LCD driver connected to the outside from control pin
This section is constituted as follows.
• Shift-register type LCD driver control mode (SR type)
• RAM built-in type LCD driver control mode (RAM mode)
3.14.1
3.14.2
3.14.3
3.14.4
3.14.5
3.14.4.1
3.14.4.2
3.14.4.3
3.14.4.4
3.14.4.5
3.14.4.6
3.14.4.7
3.14.4.8
3.14.5.1
3.14.5.2
3.14.5.3
Feature of LCDC of Each Mode
Block Diagram
SFR
Shift-Register Type LCD Driver Control Mode (SR type)
RAM Built-in Type LCD Driver Control Mode (RAM type)
Operation
Gray Scale Mode Indication
Memory Mapping
Hardware Cursor
Frame Signal Settlement
Timing Charts of Interpreting Memory Codes
Interface Examples at SR Mode
Sample Program
Operation
Interface Examples at Internal RAM Mode
Sample Program
91C820A-234
TMP91C820A
2008-02-20