TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 132

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
EMCCR0
(00E3H)
Bit symbol
Read/Write
After reset
Function
(6) LCDC and MELODY/ALARM circuit supply mode
OPERATE
STOP
1. Clock generate by timer 3
2. Clock supply start (<TA3LCDE> = 1 or <TA3MLD> = 1)
3. Need setup time
4. LCDC or MELODY/ALARM start to operate
1. LCDC or MELODY/ALARM stop to operate
2. Clock supply cut off (<TA3LCDE> = 0 or <TA3MLDE> = 0)
source clock TA3 clock generated by TMRA3. And keep the rule under below.
This function can operate only TMRA3. It can use LCDC or MELODY/ALARM
PROTECT TA3LCDE
Protect flag
0: OFF
1: ON
7
R
0
LCDC
source clock
0: 32 kHz
1: TA3OUT
R/W
6
0
Address
hold
0: Normal
1: Enable
AHOLD
R/W
5
0
91C820A-130
Melody/alarm
source clock
0: 32 kHz
1: TA3OUT
TA3MLDE HRESENA
R/W
4
0
HRESET
0: Disable
1: Enable
R/W
3
0
1: External
EXTIN
clock
R/W
2
0
fc oscillator
driver ability
1: Normal
0: Weak
DRVOSCH
R/W
1
1
fs oscillator
driver ability
1: Normal
0: Weak
TMP91C820A
DRVOSCL
R/W
2008-02-20
0
1

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