TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 293

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

*The target ports to change are SDCKE pin and SDCS pin.
*The method of Self refresh Entry includes the condition 4).
* SR : Self refresh , AR : Auto refresh
(Outline concept to control)
CPU
Port condition
SDRAM condition
f
SYS
18MHz
32KHz
SDRAM controller
｜
｜
internal condition
SDRAM control pin
condition
condition
ENTRY
AR
AR
SR
4) Auto Exit problem when exiting from Self Refresh Mode of SDRAM
Change to
changing clock, it might not be suit specification of SDRAM. Because automatic
releasing Self Refresh function (Auto Exit function) operates by CPU releasing
HALT mode.
port
When using Self Refresh function together with stand-by function of CPU or
Following figure shows example for avoid this problem by S/W.
Change
CLK
SR condition
Change to Low clock
Gear-down or
HALT
HALT mode
General port setting
Interrupt
91C820A-291
Auto EXIT
SR condition
condition
ENTRY
SR
AR
Change to High clock
Gear-up or
Change
CLK
Change to
SR condition
port
EXIT
SDRAM control pin
SR
TMP91C820A
condition
condition
AR
AR
2008-02-20