FAN5099 Fairchild Semiconductor, FAN5099 Datasheet - Page 12

• Manufacturer Part Number: FAN5099
• Description: PWM and ULDO Controller Combo
• Manufacturer: Fairchild Semiconductor

FAN5099 Rev. 1.0.1
© 2006 Fairchild Semiconductor Corporation
controller shuts down the converter. This shutdown fea-
ture is disabled during the start-up until the voltage on
the SS capacitor crosses 1.2V.
To achieve current limit, the FAN5099 monitors the
inductor current during the OFF time by monitoring and
holding the voltage across the lower MOSFET. The volt-
age across the lower MOSFET is sensed between the
PGND and the SW pins.
The output of the summing amplifier is a function of the
inductor current, R
of the current sense amplifier. With the R
of current sensing, the current limit can vary widely from
unit to unit. R
also has a typical junction temperature coefficient of
about 0.4%/°C (consult the MOSFET datasheet for
actual values). The set point of the actual current limit
decreases in proportion to increase in MOSFET die tem-
perature. A factor of 1.6 in the current limit set point typi-
cally compensates for all MOSFET R
assuming the MOSFET's heat sinking keeps its operat-
ing die temperature below 125°C.
For more accurate current limit setting, use resistor
sensing. In a resistor sensing scheme, an appropriate
current sense resistor is connected between the source
terminal of the bottom MOSFET and PGND.
Set the current limit by choosing R
where:
R
I
K1 is a constant to accommodate for the variation of
MOSFET R
With K1 = 1.6, I
Vout = 1.5V, F
calculates to be 323.17KΩ.
Auto Restart (PWM)
The FAN5099 supports two modes of response when the
internal fault latch is set. The user can configure it to
keep the power supply latched in the OFF state OR in
the Auto Restart mode. When the EN pin is tied to V
the power supply is latched OFF. When the EN pin is ter-
minated with a 100nF to GND, the power supply is in
Auto Restart mode. The table below describes the rela-
tionship between PWM restart and setting on EN pin. Do
not leave the EN pin open without any capacitor.
R
MAX
ILIM
ILIM
=
is the maximum load current.
is in KΩ.
128
+
DS(ON)
K1 I
-----------------------------------------------------------------
DS_ON
SW
•
MAX
MAX
= 300 kHz, R
DS_ON
(typically 1.6).
•
1.43
R
not only varies from unit to unit, but
= 20A, R
DSON
of the bottom FET and the gain
•
10
3
-
+
DS(ON)
RAMP
( - )
1
ILIM
------- - -
Vin
1.8
= 400 KΩ, R
= 7mΩ, Vin = 24V,
as follows:
•
DS_ON
Vout 33.32 10
--------------------------------------------------
DS_ON
F
SW
•
•
variations,
R
RAMP
ILIM
method
•
(EQ. 4)
11
- -
CC
,
12
The fault latch can also be reset by recycling the VCC to
the controller.
Under Voltage Protection (PWM)
The PWM converter output is monitored constantly for
under voltage at the FB pin. If the voltage on the FB pin
stays lower than 75% of internal Vref for 16 clock cycles,
the fault latch is set and the converter shuts down. This
shutdown feature is disabled during startup until the volt-
age on the SS capacitor reaches 1.2V.
Over-Voltage Protection (PWM)
The PWM converter output voltage is monitored con-
stantly at the FB pin for over voltage. If the voltage on the
FB pin stays higher than 115% of internal Vref for 2 clock
cycles, the controller turns OFF the upper MOSFET and
turns ON the lower MOSFET. This crowbar action stops
when the voltage on the FB pin comes down to 0.4V to
prevent the output voltage from becoming negative. This
over-voltage protection (OVP) feature is active as soon
as the voltage on the EN pin becomes high.
Turning ON the low-side MOSFETs on an OVP condition
pulls down the output, resulting in a reverse current,
which starts to build up in the inductor. If the output over-
voltage is due to failure of the high-side MOSFET, this
crowbar action pulls down the input supply or blows its
fuse, protecting the system, which is very critical.
During soft-start, if the output overshoots beyond 115%
of Vref, the output voltage is brought down by the low-
side MOSFET until the voltage on the FB pin goes below
0.4V. The fault latch is NOT set until the voltage on the
SS pin reaches 1.2V. Once the fault latch is set, the con-
verter shuts down.
Thermal Fault Protection
The FAN5099 features thermal protection where the IC
temperature is monitored. When the IC junction temper-
ature exceeds +160°C, the controller shuts down and
when the junction temperature gets down to +125°C, the
converter restarts.
FB
115% Vref
0.4V
Cap to GND
Pull to GND
Figure 22. Over-Voltage Protection
EN Pin
V
CC
ILIM
UV
Delay
2 Clks
OV
TDELAY (Sec.) = 0.85 x C
V
S
R
SS
No restart after fault
>1.2V
Q
where C is in μF
PWM/Restart
Restart after
EN
OFF
S
R
www.fairchildsemi.com
Q
LS Drive
Fault
Latch