FAN5099 Fairchild Semiconductor, FAN5099 Datasheet - Page 15

• Manufacturer Part Number: FAN5099
• Description: PWM and ULDO Controller Combo
• Manufacturer: Fairchild Semiconductor

FAN5099 Rev. 1.0.1
© 2006 Fairchild Semiconductor Corporation
(P
the FAN5099.
P
where Q
Low-Side Losses
Q2 switches on or off with its parallel schottky diode
simultaneously conducting, so the V
P
negligible and Q2 is selected based on R
Conduction losses for Q2 are given by the following
equation:
where R
highest operating junction temperature and D=V
is the minimum duty cycle for the converter.
Since D
duces a conservative result, simplifying the calculation.
The maximum power dissipation (P
of the maximum allowable die temperature of the low-
side MOSFET, the θ
ambient temperature rise. P
the following equation:
θ
devoted to heat sinking.
Selection of MOSFET Snubber Circuit
The Switch node (SW) ringing is caused by fast switch-
ing transitions due to the energy stored in the parasitic
elements. This ringing on the SW node couples to other
P
P
P
JA
GATE
SW
Gate
COND
D MAX
GATE
(
depends primarily on the amount of PCB area
is proportional to V
is determined by the following equation:
) in calculating the power dissipation required for
=
MIN
)
G
=
DS(ON)
V
Q
=
is the total gate charge to reach V
IN
(
G
1 D
< 20% for portable computers, (1-D) ≈ 1 pro-
T
------------------------------------------------ -
×
–
J MAX
(
V
R
is the R
CC
RAMP
) I
×
)
θ
×
–
2
OUT
JA
F
JA,
T
SW
A MAX
DS(ON)
(
×
DS
and the maximum allowable
R
Figure 25. Closed-Loop System with Type 3 Network
, Q2's switching losses are
DS ON
D(MAX)
)
Ramp
Generator
(
of the MOSFET at the
)
D(MAX)
is calculated using
DS
DS(ON)
Amplifier
Summing
Amplifier
Current
Sense
≈ 0.5V. Since
) is a function
CC
.
alone.
(EQ. 13)
(EQ. 14)
(EQ. 15)
OUT
/V
DRIVER
IN
PW M
&
15
Reference
P
circuits around the converter if they are not handled
properly. To dampen this ringing, an R-C snubber is con-
nected across the SW node and the source of the low-
side MOSFET.
R-C components for the snubber are selected as follows:
a) Measure the SW node ringing frequency (F
low capacitance scope probe.
b) Connect a capacitor (C
so that it reduces this ringing by half.
c) Place a resistor (R
R
d) Calculate the power dissipated in the snubber resistor
as shown in the following equation:
where, V
is the converter switching frequency.
The snubber resistor chosen should be de-rated to han-
dle the worst-case power dissipation. Do not use wire-
wound resistors for R
Loop Compensation
Typically, the closed-loop crossover frequency (F
where the overall gain is unity, should be selected to
achieve optimal transient and steady-state response to
disturbances in line and load conditions. It is recom-
mended to keep F
frequency of the converter. Higher phase margin tends to
have a more stable system with more sluggish response
to load transients. Optimum phase margin is about 60°, a
good compromise between steady-state and transient
responses. A typical design should address variations
over a wide range of load conditions and over a large
sample of devices.
R
R SNUB
SNUB
SNUB
(
is calculated using the following equation:
=
)
IN(MAX)
C1
---------------------------------------------- -
π
=
R
×
BI AS
C
V
F
IN
SNUB
ring
C2
is the maximum input voltage and FSW
Q2
R2
2
cross
L
Q1
×
×
C
SNUB
V
SNUB
SNUB
2
IN MAX
below one-fifth of the switching
R
(
DC
SNUB
) in series with this capacitor.
C3
.
R1
R
)
) from SW node to GND
C
×
ES
R3
F
SW
R
VOUT
L
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ring
(EQ. 16)
(EQ. 17)
) with a
cross
),