DS2148 Dallas Semiconducotr, DS2148 Datasheet - Page 32

• Manufacturer Part Number: DS2148
• Description: 5V E1/T1/J1 Line Interface
• Manufacturer: Dallas Semiconducotr

CCR5 (04H): COMMON CONTROL REGISTER 5
BACK PLANE CLOCK SELECT Table 6-3
MONITOR GAIN SETTINGS Table 6-4
BPCS1
(MSB)
SYMBOL
RSCLKE
TSCLKE
BPCS1
BPCS0
MM1
MM0
RT1
RT0
(CCR5.7)
BPCS1
0
0
1
1
BPCS0
POSITION
CCR5.7
CCR5.6
CCR5.5
CCR5.4
CCR5.3
CCR5.2
CCR5.1
CCR5.0
MM1
DESCRIPTION
Back Plane Clock Select 1. See Table 6-3 for details.
Back Plane Clock Select 0. See Table 6-3 for details.
Monitor Mode 1. See Table 6-4.
Monitor Mode 0. See Table 6-4.
Receive Synchronization Clock Enable.
This control bit determines whether the line receiver should
handle normal T1/E1 signals or a synchronized signal.
E1 mode:
0 = receive normal E1 signal (Section 6 of G.703)
1 = receive 2.048 MHz synchronization signal (section 10 of
G.703)
T1 mode:
0 = receive normal T1 signal
1 = receive 1.544 MHz synchronization signal
Transmit Synchronization Clock Enable.
This control bit determines whether the transmitter should
transmit normal T1/E1 signals or a synchronized signal.
E1 mode:
0 = transmit normal E1 signal (section 6 of G.703)
1 = transmit 2.048 MHz synchronization signal (section 10 of
G.703)
T1 mode:
0 = transmit normal T1 signal
1 = transmit 1.544 MHz synchronization signal
Receive Termination 1. See Table 6-5 for details.
Receive Termination 0. See Table 6-5 for details.
(CCR5.6)
BPCS0
MM0
0
1
0
1
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RSCLKE
BPCLK FREQUENCY
TSCLKE
16.384MHz
8.192MHz
4.096MHz
2.048MHz
RT1
(LSB)
RT0