DS2148 Dallas Semiconducotr, DS2148 Datasheet - Page 40

• Manufacturer Part Number: DS2148
• Description: 5V E1/T1/J1 Line Interface
• Manufacturer: Dallas Semiconducotr

8. DIAGNOSTICS
8.1
The DS2148 has the ability to generate and detect a repeating bit pattern that is from one to eight or
sixteen bits in length. To transmit a pattern, the user will load the pattern to be sent into the Transmit
Code Definition (TCD1 and TCD2) registers and select the proper length of the pattern by setting the
TC0 and TC1 bits in the In-Band Code Control (IBCC) register. When generating a 1, 2, 4, 8, or 16 bit
pattern both the transmit code registers (TCD1 and TCD2) must be filled with the proper code.
Generation of a 1, 3, 5, or 7-bit pattern only requires TCD1 to be filled. Once this is accomplished, the
pattern will be transmitted as long as the TLCE control bit (CCR3.3) is enabled. As an example, if the
user wished to transmit the standard “loop up” code for Channel Service Units which is a repeating
pattern of ...10000100001... then 80h would be loaded into TCD1 and the length would set using TC1 and
TC0 in the IBCC register to 5 bits.
The DS2148 can detect two separate repeating patterns to allow for both a loop-up code and a loop-down
code to be detected. The user will program the codes to be detected in the Receive Up Code Definition
(RUPCD1 and RUPCD2) registers and the Receive Down Code Definition (RDNCD1 and RDNCD2)
registers and the length of each pattern will be selected via the IBCC register. The DS2148 will detect
repeating pattern codes with bit error rates as high as 1x10
period of 48ms, hence, after about 48ms of receiving either code, the proper status bit (LUP at SR.7 and
LDN at SR.6) will be set to a one. Normally codes are sent for a period of 5 seconds. It is recommended
that the software poll the DS2148 every 100ms to 1000ms until 5 seconds has elapsed to ensure that the
code is continuously present.
IBCC (0AH): IN–BAND CODE CONTROL REGISTER
(MSB)
TC1
SYMBOL
RDN2
RDN1
RDN0
RUP2
RUP1
RUP0
TC1
TC0
In-Band Loop Code Generation and Detection
TC0
POSITION
IBCC.7
IBCC.6
IBCC.5
IBCC.4
IBCC.3
IBCC.2
IBCC.1
IBCC.0
RUP2
DESCRIPTION
Transmit Code Length Definition Bit 1. See Table 8-1
Transmit Code Length Definition Bit 0. See Table 8-1
Receive Up Code Length Definition Bit 2. See Table 8-2
Receive Up Code Length Definition Bit 1. See Table 8-2
Receive Up Code Length Definition Bit 0. See Table 8-2
Receive Down Code Length Definition Bit 2. See Table 8-2
Receive Down Code Length Definition Bit 1. See Table 8-2
Receive Down Code Length Definition Bit 0. See Table 8-2
RUP1
40 of 75
RUP0
-2
. The code detector has a nominal integration
RDN2
RDN1
(LSB)
RDN0