mt48lc16m4a2tg Micron Semiconductor Products, mt48lc16m4a2tg Datasheet - Page 26

• Manufacturer Part Number: mt48lc16m4a2tg
• Description: 64mb X4, X8, X16 Sdram
• Manufacturer: Micron Semiconductor Products

WRITE with Auto Precharge
3. Interrupted by a READ (with or without auto
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
precharge): A READ to bank m will interrupt a WRITE
on bank n when registered, with the data-out appear-
ing CAS latency later. The PRECHARGE to bank n will
begin after
READ to bank m is registered. The last valid WRITE to
bank n will be data-in registered one clock prior to the
READ to bank m (Figure 26).
t
WR is met, where
Internal
States
Internal
States
WRITE With Auto Precharge Interrupted by a WRITE
NOTE: 1. DQM is LOW.
WRITE With Auto Precharge Interrupted by a READ
COMMAND
COMMAND
NOTE: 1. DQM is LOW.
ADDRESS
ADDRESS
BANK m
BANK m
BANK n
BANK n
CLK
CLK
DQ
DQ
t
WR begins when the
Page Active
Page Active
T0
NOP
T0
NOP
WRITE - AP
WRITE - AP
BANK n,
BANK n,
Page Active
BANK n
Page Active
BANK n
COL a
COL a
T1
D
T1
D
a
a
IN
IN
WRITE with Burst of 4
WRITE with Burst of 4
Figure 27
Figure 26
T2
a + 1
T2
a + 1
D
D
NOP
NOP
IN
IN
26
BANK m,
READ - AP
T3
COL d
a + 2
T3
BANK m
D
NOP
IN
4. Interrupted by a WRITE (with or without auto
Interrupt Burst, Write-Back
t
CAS Latency = 3 (BANK m)
WR - BANK n
READ with Burst of 4
precharge): A WRITE to bank m will interrupt a WRITE
on bank n when registered. The PRECHARGE to bank
n will begin after
the WRITE to bank m is registered. The last valid data
WRITE to bank n will be data registered one clock prior
to a WRITE to bank m (Figure 27).
BANK m,
WRITE - AP
TRANSITIONING DATA
TRANSITIONING DATA
COL d
T4
BANK m
T4
D
NOP
t
d
IN
WR - BANK n
Interrupt Burst, Write-Back
WRITE with Burst of 4
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T5
T5
d + 1
NOP
NOP
D
IN
Precharge
t
RP - BANK n
t
WR is met, where
T6
T6
d + 2
D
NOP
NOP
D
OUT
d
t RP - BANK n
IN
Precharge
64Mb: x4, x8, x16
DON’T CARE
DON’T CARE
T7
T7
D
d + 1
d + 3
NOP
NOP
D
t WR - BANK m
t RP - BANK m
OUT
IN
Write-Back
t
WR begins when
©2003, Micron Technology, Inc.
SDRAM