mc68hc908jb16 Freescale Semiconductor, Inc, mc68hc908jb16 Datasheet - Page 135

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mc68hc908jb16

Manufacturer Part Number
mc68hc908jb16
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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9.5 Security
MC68HC908JB16
Freescale Semiconductor
NOTE:
Rev. 1.1
A security feature discourages unauthorized reading of FLASH locations
while in monitor mode. The host can bypass the security feature at
monitor mode entry by sending eight security bytes that match the bytes
at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-
defined data.
Do not leave locations $FFF6–$FFFD blank. For security reasons,
program locations $FFF6–$FFFD.
During monitor mode entry, the MCU waits after the power-on reset for
the host to send the eight security bytes on pin PTA0. If the received
bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all FLASH locations and execute code
from FLASH. Security remains bypassed until a power-on or an LVI
reset occurs. If the reset was not a power-on or an LVI reset, security
remains bypassed and security code entry is not required.
(See
PTA0
RST
NOTES:
V
DD
1 = Echo delay, 2 bit times.
2 = Data return delay, 2 bit times.
4 = Wait 1 bit time before sending next byte.
Figure
9-8.)
FROM HOST
FROM MCU
Figure 9-8. Monitor Mode Entry Timing
Monitor ROM (MON)
4096 + 32 OSCDCLK CYCLES
1
256 BUS CYCLES (MINIMUM)
4
1
1
Monitor ROM (MON)
2
Technical Data
4
1
135

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