mc68hc908jb16 Freescale Semiconductor, Inc, mc68hc908jb16 Datasheet - Page 298

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mc68hc908jb16

Manufacturer Part Number
mc68hc908jb16
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Computer Operating Properly (COP)
17.3 Functional Description
Technical Data
298
INTERNAL RESET SOURCES
(COPRS FROM CONFIG)
RESET VECTOR FETCH
(COPD FROM CONFIG)
STOP INSTRUCTION
COPEN (FROM SIM)
NOTE:
COPCTL WRITE
COPCTL WRITE
COP RATE SEL
COP DISABLE
OSCDCLK
RESET
Figure 17-1
The COP counter is a free-running 6-bit counter preceded by a 12-bit
prescaler counter. If not cleared by software, the COP counter overflows
and generates an asynchronous reset after 2
OSCDCLK cycles, depending on the state of the COP rate select bit,
COPRS, in configuration register 1. With a 2
overflow option, a 24MHz OSCDCLK (12MHz crystal) gives a COP
timeout period of 10.92ms. Writing any value to location $FFFF before
an overflow occurs prevents a COP reset by clearing the COP counter
and stages 12 through 5 of the prescaler.
Service the COP immediately after reset and before entering or after
exiting stop mode to guarantee the maximum time before the first COP
counter overflow.
Figure 17-1. COP Block Diagram
Computer Operating Properly (COP)
12-BIT COP PRESCALER
shows the structure of the COP module.
COP CLOCK
COP COUNTER
6-BIT COP COUNTER
CLEAR
18
RESET STATUS REGISTER
18
– 2
MC68HC908JB16
– 2
RESET CIRCUIT
Freescale Semiconductor
4
4
OSCDCLK cycle
or 2
13
– 2
4
Rev. 1.1

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