mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 131

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mc68hc05pv8a

Manufacturer Part Number
mc68hc05pv8a
Description
Mc68hc05pv8a Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
9.3.4 Timer Control Register 1
MC68HC(8)05PV8/A — Rev. 1.9
The free-running counter contents are transferred to the input capture
register on each proper signal transition regardless of whether the input
capture flag (IC2F) is set or clear. The input capture register always
contains the free-running counter value that corresponds to the most
recent input capture.
After a read of the input capture register most significant byte ($14), the
counter transfer is inhibited until the least significant byte ($15) is also
read. This characteristic causes the time used in the input capture
software routine, and its interaction with the main program, to determine
the minimum pulse period.
A read of the input capture register LSB ($15) does not inhibit the
free-running counter transfer since they occur on opposite edges of the
internal bus clock.
ICI1E – Input Capture 1 Interrupt Enable
ICI2E – Input Capture 2 Interrupt Enable
OCI1E – Output Compare 1 Interrupt Enable
TOIE – Timer Overflow Interrupt Enable
$001C
Reset:
Read:
Write:
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1 = Interrupt enabled
0 = Interrupt disabled
1 = Interrupt enabled
0 = Interrupt disabled
1 = Interrupt enabled
0 = Interrupt disabled
1 = Interrupt enabled
0 = Interrupt disabled
ICI1E
Bit 7
0
Figure 9-2 Timer Control Register 1 (TCR1)
16-Bit Programmable Timer
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ICI2E
6
0
OCI1E
5
0
TOIE
4
0
OCI2E
3
0
16-Bit Programmable Timer
U
2
U
1
Technical Data
Registers
TOFF
Bit 0
0

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