mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 97

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mc68hc05pv8a

Manufacturer Part Number
mc68hc05pv8a
Description
Mc68hc05pv8a Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
7.4.4 Port A Configuration Register
MC68HC(8)05PV8/A — Rev. 1.9
VRHEN – Enable A/D High Reference Channel
PUHEN – PA4–7 Pull-Up Resistor Enable Higher Nibble
EDGEH – PA4–7 Interrupt Edge Higher Nibble
PAHIE – PA4–7 Interrupt Enable Higher Nibble
PULEN – PA0–3 Pull-Up Resistor Enable Lower Nibble
EDGEL – PA0–3 Interrupt Edge Lower Nibble
Reset:
$0020
Read:
Write:
Those bits connect the PA7 pin with the A/D high reference channel.
This bit disables/enables the pull-up resistors of the PA4–7 pins.
This bit selects the trigger edges of the interrupt lines PA4–7.
This bit disables/enables the PA4–7 pins as an interrupt group.
This bits disables/enables the pull-up resistors of the PA0–3 pins.
This bit selects the trigger edges of the interrupt lines PA0–3.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = A/D high reference channel connected to external VREFH.
0 = A/D high reference channel connected to internal voltage
1 = PA4–7 pull-up resistors disabled
0 = PA4–7 pull-up resistors enabled
1 = Rising edge sensitive
0 = Falling edge sensitive
1 = PA4–7 interrupt enabled
0 = PA4–7 interrupt disabled
1 = PA0–3 pull-up resistors disabled
0 = PA0–3 pull-up resistors enabled
1 = Rising edge sensitive
0 = Falling edge sensitive
VRHEN
Figure 7-2 Port A Configuration Register (PACFG)
Bit 7
supply.
0
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PUHEN
Input/Output Ports
6
0
EDGEH
5
0
PAHIE
4
0
PULEN
3
0
EDGEL
2
0
Input/Output Ports
PALIE
1
0
Technical Data
VRLEN
Bit 0
Port A
0

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