mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 158

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mc68hc05pv8a

Manufacturer Part Number
mc68hc05pv8a
Description
Mc68hc05pv8a Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Technical Data
13.3 EEPROM Control Register (EEPCR)
Technical Data
EEOSC – EEPROM RC Oscillator Control
EER1, EER0 – Erase Select Bits
$000C
Reset:
Read:
Write:
When this bit is set, the EEPROM section uses the internal RC
oscillator instead of the CPU clock. The user must wait a time t
after setting the EEOSC bit to allow the RC oscillator to stabilize.
EEOSC is readable and writable. It should be set by the user when
the internal bus frequency falls below 1.5 MHz. Reset clears this bit.
EER1 and EER0 form a 2-bit field that is used to select one of three
erase modes: byte, block, or bulk erase.
selected for each bit configuration. These bits are readable and
writable and are cleared by reset.
In byte erase mode, only the selected byte is erased. In block mode,
a 128-byte block of EEPROM is erased. The EEPROM memory
space is divided into two 64-byte blocks ($0180–$01BF,
$01C0–$01FF) and performing a block erase on any address within
a block will erase the entire block. In bulk erase mode, the entire 128
byte EEPROM section is erased.
A block protect function applies on block2 of the EEPROM memory
space. See
details.
Freescale Semiconductor, Inc.
For More Information On This Product,
Bit 7
Figure 13-1 EEPROM Control Register (EEPCR)
0
0
Go to: www.freescale.com
13.4 EEPROM Options Register (EEOPR)
EER1
0
0
1
1
6
0
0
EEPROM
Table 13-1 Erase Mode Select
EER0
0
1
0
1
5
0
0
No erase
Byte erase
Block erase (block1 or block2)
Bulk erase (block1 & block2)
EEOSC
4
0
EER1
MODE
Table 13-1
3
0
MC68HC(8)05PV8/A — Rev. 1.9
EER0
2
0
shows the modes
EELAT
1
0
for more
EEPGM
RCON
Bit 0
0

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