mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 78

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mc68hc05pv8a

Manufacturer Part Number
mc68hc05pv8a
Description
Mc68hc05pv8a Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Technical Data
5.3 Reset status register (RSR)
Technical Data
This register contains eight flags that show the source of the last reset.
A power-on reset sets the POR bit in the system control register and
clears all other bits in the reset status register. All bits can be cleared by
writing a one to the corresponding bit. Uncleared bits remain set as long
as they are not cleared by a power-on reset or by software.
PINR – External Reset Bit
STOPR – Illegal STOP Instruction Reset Bit
COPR – COP (Computer Operating Properly) Reset Bit
ILINR – Illegal Instruction Reset Bit
CMR – Clock Monitor Reset Bit
$002A
Read:
Write:
POR:
Indicates the last reset was caused by a disabled STOP instruction.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Last reset caused by external reset pin (RESET)
0 = No pin reset since PINR was cleared by software or POR
1 = Last reset caused by a disabled STOP instruction
0 = No illegal STOP instruction since STOPR was cleared by
1 = Last reset caused by COP
0 = No COP reset since COPR was cleared by software or POR
1 = Last reset caused by an instruction fetch from an illegal address
0 = No illegal instruction fetch reset since ILINR was cleared by
1 = Last reset caused by the clock monitor due to a failure on
0 = No clock monitor reset since CMR was cleared by software or
PINR
Bit 7
software or POR
software or POR
system clock or system clock is back. Refer to RCON status bit
in the interrupt status register
POR
0
Figure 5-1 Reset Status Register (RSR)
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STOPR
6
0
Resets
COPR
5
0
ILINR
4
0
CMR
3
0
MC68HC(8)05PV8/A — Rev. 1.9
HTR
2
0
HVR
1
0
Bit 0
LVR
0

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