mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 80

• Manufacturer Part Number: mc68hc05pv8a
• Description: Mc68hc05pv8a Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Technical Data
5.5 Internal Resets
5.6 Power-On Reset (POR)
Technical Data
The eight internally generated resets are the initial power-on reset
function, the COP watchdog timer reset, the illegal address detector,
clock-monitor, the high temperature reset, high voltage reset,
low-voltage reset, and the disabled STOP instruction.
When forcing RESET externally to V
clock-monitor dependent reset sources are disabled. In this case, the
internal pull-down device tries to pull down the pin until the next
recognized internal reset, which leads to some power-consumption.
The internal POR is generated on power-up to allow the clock oscillator
to stabilize. The POR is strictly for power turn-on conditions and is not
able to detect a drop in the power supply voltage (brown-out). There is
an oscillator stabilization delay of t
active. See
cycles.
The POR generates the RST signal which resets the CPU. If any other
reset function is active at the end of this t
remains in the reset condition until the other reset condition(s) ends.
POR activates the RESET pin pull-down device connected to the pin.
VDD must drop below V
the next rise of V
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Figure 5-2
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INTERNAL
PULLUP
RESET
PIN
DD
.
Resets
for details. T
POR
VDD
in order for the internal POR circuit to detect
PORL
PORL
DD
INTERNAL
RESETS
, all temperature, voltage and
after the oscillator becomes
is 4064 internal processor clock
PORL
MC68HC(8)05PV8/A — Rev. 1.9
delay, the RST signal
INTERNAL
RESET
LOGIC