mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 49

• Manufacturer Part Number: mc68hc05pv8a
• Description: Mc68hc05pv8a Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

3.5.2 Immediate
3.5.3 Direct
3.5.4 Extended
3.5.5 Indexed, No Offset
MC68HC(8)05PV8/A — Rev. 1.9
increment accumulator (INCA). Inherent instructions require no operand
address and are one byte long.
Immediate instructions are those that contain a value to be used in an
operation with the value in the accumulator or index register. Immediate
instructions require no operand address and are two bytes long. The
opcode is the first byte, and the immediate data value is the second byte.
Direct instructions can access any of the first 256 memory locations with
two bytes. The first byte is the opcode, and the second is the low byte of
the operand address. In direct addressing, the CPU automatically uses
$00 as the high byte of the operand address.
Extended instructions use three bytes and can access any address in
memory. The first byte is the opcode; the second and third bytes are the
high and low bytes of the operand address.
When using the Motorola assembler, the programmer does not need to
specify whether an instruction is direct or extended. The assembler
automatically selects the shortest form of the instruction.
Indexed instructions with no offset are 1-byte instructions that can
access data with variable addresses within the first 256 memory
locations. The index register contains the low byte of the effective
address of the operand. The CPU automatically uses $00 as the high
byte, so these instructions can address locations $0000–$00FF.
Indexed, no offset instructions are often used to move a pointer through
a table or to hold the address of a frequently used RAM or I/O location.
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CPU and Instruction Set
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CPU and Instruction Set
Addressing Modes
Technical Data