mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 170

• Manufacturer Part Number: mc68hc05pv8a
• Description: Mc68hc05pv8a Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Technical Data
Technical Data
PB0
PB1
PB2
PB3
PA0-3
Figure 15-1 Basic Fast Peripheral Interface Timing
The basic timing as shown in
the HC11 parts in expanded multiplex mode. At the falling edge of the
address strobe signal (AS/PB0) the addresses on PA0–3, the read/write
signal (RW/PB1) and the chip select (CS/PB3) signal are valid. A high
DEN/PB2 signal indicates that data are driven on the bus in CPU write
cycles or that the peripheral IC can drive data in read cycles. Whenever
the FPICLK bit in the system control register is set the signals become
only active when the range from $0030–$003F is addressed by the CPU
thus significantly reducing electromagnetic noise.
When using the A/D converter in conjunction with the fast peripheral
interface the VRLEN bit of port A configuration register must be cleared.
See
Freescale Semiconductor, Inc.
AS
7.4.4 Port A Configuration
For More Information On This Product,
Go to: www.freescale.com
Fast Parallel Interface
A0–3
Figure 15-1
RW
CS
Register.
is similar to the timing used on
MC68HC(8)05PV8/A — Rev. 1.9
DEN
D0–3