mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 85

• Manufacturer Part Number: mc68hc05pv8a
• Description: Mc68hc05pv8a Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.11 High Voltage Reset
5.12 Low Voltage Reset
5.13 Operation in STOP and WAIT Mode
5.14 Clock Monitor Reset (CMR)
MC68HC(8)05PV8/A — Rev. 1.9
The internal high voltage (HVR) reset is generated when the supply
voltage V
condition remains active until the supply voltage falls below the threshold
V
This reset can be disabled by using a mask option.
The internal low voltage (LVR) reset is generated when the supply
voltage V
remains active until the voltage rises above the threshold V
proper power-on sequence occurs.
If enabled, all reset sources remain active during STOP and WAIT. Any
reset source can bring the MCU out of STOP or WAIT modes.
Since no instructions are executed in WAIT or STOP mode the illegal
address reset and the stop disabled reset cannot become active in
STOP or WAIT mode.
Since the core timer is not active in STOP mode, the COP reset cannot
become active in STOP mode.
On 68HC05PV8A, generation of HVR and HTR are suppressed if the
ultra low power mode is selected by setting the ULPM bit.
The clock monitor reset is based on an internal RC time delay. If no MCU
clock edges are detected within this RC time delay, the clock monitor can
optionally generate a system reset. The system clock is then
automatically switched to an on-chip RC oscillator. The clock monitor
function is enabled via a mask option bit. Clock monitor is used as a
HVROFF
Freescale Semiconductor, Inc.
For More Information On This Product,
.
DD
SUP
falls below the low voltage threshold V
rises above the high voltage reset threshold V
Go to: www.freescale.com
Resets
LVRON
High Voltage Reset
. This condition
HVRON
LVROFF
Technical Data
. This
Resets
or a