mc68hc705e5 Freescale Semiconductor, Inc, mc68hc705e5 Datasheet - Page 42

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mc68hc705e5

Manufacturer Part Number
mc68hc705e5
Description
M68hc05 Family Of Microcontrollers Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Resets
5.3 External Reset (RESET)
General Release Specification
IRQ/V
RESET
STOPEN
ADDRESS
ADDRESS
TST
OSC
DATA
V
DD
NOTE:
(PULSE WIDTH = 3xE-CLK)
POWER-ON RESET
ILLEGAL ADDRESS
COP WATCHDOG
DISABLED STOP
INSTRUCTION
(ILLADDR)
(COPR)
The RESET pin is the only external source of a reset. This pin is
connected to a Schmitt trigger input gate to provide an upper and lower
threshold voltage separated by a minimum amount of hysteresis. This
external reset occurs whenever the RESET pin is pulled below the lower
threshold and remains in reset until the RESET pin rises above the
upper threshold. This active-low input will generate the RST signal and
reset the CPU and peripherals. The only reset sources that can alter the
MCU’s operating mode are termination of the external reset input or the
internal computer operating properly (COP) watchdog reset.
Activation of the RST signal is generally referred to as a reset of the
device, unless otherwise specified.
(POR)
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 5-1. Reset Block Diagram
Go to: www.freescale.com
PH2
Resets
ONE-SHOT
CLOCKED
PH2
D
D
LATCH
LATCH
S
R
MC68HC705E5
CPU
RST
PERIPHERALS
SELECT
TO IRQ
LOGIC
MODE
TO OTHER
Rev. 1.0

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