mfrc522 NXP Semiconductors, mfrc522 Datasheet - Page 10

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mfrc522

Manufacturer Part Number
mfrc522
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
112132
Product data sheet
Fig 6.
ISO14443-A Framing at 106 kbit/s
ISO14443-A Framing at 212, 424 and 848 kbit/s
Burst of
32 sub-
carrier
clocks
Data Coding and framing according to ISO/IEC 14443A.
Start
Start
Start Bit is "1"
Start Bit is "0"
Table 4:
The contactless UART of MFRC522 and a dedicated external host are required to handle
the complete MIFARE
“Data Coding and framing according to ISO/IEC 14443A.”
framing according to ISO/IEC 14443A / MIFARE®.
The internal CRC co-processor calculates the CRC value according to the definitions
given in the ISO/IEC 14443A part 3 and handles parity generation internally according to
the transfer speed. Automatic parity generation can be switched off by bit ParityDisable in
register 0x1D ManualRCVReg.
Communication
direction
Card → Reader
(MFRC522
receives data from
a card)
8 bit data
8 bit data
Communication overview for ISO/IEC 14443A/MIFARE
transfer
speed
modulation
on card side
subcarrier
frequency
bit coding
®
odd
Par
odd
Par
Rev. 3.2 — 22 May 2007
/ ISO/IEC 14443A / MIFARE
ISO/IEC 14443A/ MIFARE
106 kbit/s
subcarrier
load
modulation
13.56 MHz/16 13.56MHz/16 13.56MHz/16 13.56MHz/16
Manchester
coding
8 bit data
8 bit data
212 kbit/s
subcarrier
load
modulation
BPSK
odd
odd
Par
Par
®
protocol. The following
®
Even parity at the
shows the Data Coding and
end of the frame!
424 kbit/s
subcarrier
load
modulation
BPSK
8 bit data
8 bit data
®
reader/writer
Contactless Reader IC
MFRC522
© NXP B.V. 2007. All rights reserved.
848 kbit/s
subcarrier
load
modulation
BPSK
…continued
Figure 6
odd
Par
even
Par.
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