mfrc522 NXP Semiconductors, mfrc522 Datasheet - Page 70

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mfrc522

Manufacturer Part Number
mfrc522
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
16. Power Reduction modes
112132
Product data sheet
16.1 Hard Power-down
16.2 Soft Power-down
16.3 Transmitter Power-down
A Hard Power-down is enabled with LOW level on pin NRSTPD. This turns off all internal
current sinks as well as the oscillator. All digital input buffers are separated from the input
pads and clamped internally (except pin NRSTPD itself). The output pins are frozen at a
certain value.
The Soft Power-down mode is entered immediately after setting the bit PowerDown in the
register CommandReg to 1. All internal current sinks are switched off (including the
oscillator buffer).
In opposition to the Hard Power-down mode, the digital input-buffers are not separated by
the input pads and keep their functionality. The digital output pins do not change their
state.
During Soft Power-down, all registers values, the FIFO’s content and the configuration
itself will keep its current content.
After setting bit PowerDown in the register CommandReg to 0 it takes 1024 clocks until
the Soft Power-down mode is left as indicated by the PoweDown bit itself. Setting it to
logic 0 does not immediately clear it. It is cleared automatically by the MFRC522 when the
Soft Power-down mode is left.
Remark: If the internal oscillator is used, you have to take into account that it is supplied
by AVDD and it will take a certain time t
can be detected by the internal logic.
For the serial UART it is recommended to send the value 55 (hex) to the MFRC522 first.
For further access to the registers the oscillator must be stable. Therefore, perform a read
accesses to address 0 till the MFRC522 answers to the last read command with the
register content of address 0. This indicates that the MFRC522 is active for further
operation.
The Transmitter Power-down mode switches off the internal antenna drivers to turn off the
RF field by setting either Tx1RfEn or TX2RFEn in the register TXControlReg to logic 0.
Rev. 3.2 — 22 May 2007
osc
until the oscillator is stable and the clock cycles
Contactless Reader IC
MFRC522
© NXP B.V. 2007. All rights reserved.
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