mfrc522 NXP Semiconductors, mfrc522 Datasheet - Page 47

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mfrc522

Manufacturer Part Number
mfrc522
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
112132
Product data sheet
10.2.1 General
10.2.2 Read data
An interface compatible to an SPI interface enables a high-speed serial communication
between the MFRC522 and a μ-Controller for the communication. The implemented SPI
compatible interface is according to a standard SPI interface.
For timing specification refer to
The MFRC522 acts as a slave during the SPI communication. The SPI clock SCK has to
be generated by the master. Data communication from the master to the slave uses the
Line MOSI. Line MISO is used to send data back from the MFRC522 to the master.
On both lines (MOSI, MISO) each data byte is sent by MSB first. Data on MOSI line
should be stable on rising edge of the clock line and can changed on falling edge. The
same is valid for the MISO line. Data is provided by the MFRC522 on falling edge and is
stable during rising edge.
To read out data using the SPI compatible interface the following byte order has to be
used. It is possible to read out up to n-data bytes.
The first sent byte defines both, the mode itself and the address byte.
Table 136: Byte Order for MOSI and MISO
Remark: The most significant bit (MSB) has to be send first.
Fig 7. Connection to host with SPI
MOSI
MISO
byte 0
adr 0
MISO
SCK
MOSI
X
NSS
Rev. 3.2 — 22 May 2007
byte 1
data 0
adr 1
Section 23.8 “Timing for the SPI compatible
byte 2
data 1
adr 2
MISO
SCK
MOSI
NSS
RC522
……..
……..
to
Contactless Reader IC
data n-1
byte n
adr n
MFRC522
© NXP B.V. 2007. All rights reserved.
interface”.
byte n+1
data n
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