mfrc522 NXP Semiconductors, mfrc522 Datasheet - Page 55

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mfrc522

Manufacturer Part Number
mfrc522
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
112132
Product data sheet
10.4.6 7-BIT ADDRESSING
During the I
to determine which slave will be selected by the master.
As an exception several address numbers are reserved. During device configuration, the
designer has to ensure, that no collision with these reserved addresses is possible. Check
the corresponding I
The I
after releasing the reset pin or after power on reset, the device defines the I
according EA pin.
If EA Pin is set to LOW than for all MFRC522 devices the upper 4 bits of the device bus
address are reserved by NXP and set to 0101(bin). The remaining 3 bits (ADR_0, ADR_1,
ADR_2) of the Slave Address can freely configured by the customer in order to prevent
collisions with other I
If EA Pin is set to HIGH than ADR_0 to ADR_5 can be completely specified at the external
pins according to Table
Interface
In both modes, the external address coding is latched immediately after releasing the
reset condition. Further changes at the used pins are not taken into consideration.
Depending on the external wiring, the I
output.
Fig 15. Data transfer on the I
2
C address specification is dependent on the definition of the EA Pin. Immediately
Types”. ADR_6 is always set to logic 0.
2
C-bus addressing procedure, the first byte after the START condition is used
2
C specification for a complete list of reserved addresses.
2
C devices.
Rev. 3.2 — 22 May 2007
Table 135 “Connection Scheme for detecting the different
2
C- bus.
2
C address pins could be used for test signal
Contactless Reader IC
MFRC522
© NXP B.V. 2007. All rights reserved.
2
C address
55 of 109

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