W83977EF Winbond Electronics Corp America, W83977EF Datasheet - Page 4

• Manufacturer Part Number: W83977EF
• Description: Description = W83877TF Plus Kbc, GP I/O, Wake-Up, Power Fail Resume ;; Package = QFP 128
• Manufacturer: Winbond Electronics Corp America

4.0 INFRARED (IR) PORTS ................................................................................................................. 54
5.0 PARALLEL PORT ......................................................................................................................... 55
6.
4.1 IR PORT ...................................................................................................................................... 54
5.1 P
5.2 E
5.3 E
5.4
5.5
6.1 O
6.2 I
6.3 S
6.4
6.5 H
6.6
3.2.4 Handshake Status Register (HSR) (Read/Write) ................................................................. 49
3.2.5 UART FIFO Control Register (UFR) (Write only).................................................................. 50
3.2.6 Interrupt Status Register (ISR) (Read only).......................................................................... 51
3.2.7 Interrupt Control Register (ICR) (Read/Write) ...................................................................... 52
3.2.8 Programmable Baud Generator (BLL/BHL) (Read/Write) .................................................... 52
3.2.9 User-defined Register (UDR) (Read/Write) .......................................................................... 52
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.3.10
5.3.11
5.3.12
5.3.13
5.3.14
5.3.15
5.3.16
6.5.1
6.5.2
KEYBOARD CONTROLLER..................................................................................................... 70
NPUT
RINTER
NHANCED
XTENDED
TATUS
ARDWARE
UTPUT
C
O
E
E
OMMANDS
N
XTENSION
XTENSION
N
B
Printer Status Buffer ........................................................................................................ 57
EPP Address Port............................................................................................................ 58
EPP Data Port 0-3 ........................................................................................................... 59
Bit Map of Parallel Port and EPP Registers .................................................................... 59
EPP Operation................................................................................................................. 60
ECP Register and Mode Definitions ................................................................................ 61
Data and ecpAFifo Port ................................................................................................... 62
Device Control Register (DCR) ....................................................................................... 63
CFIFO (Parallel Port Data FIFO) Mode = 010................................................................. 64
ECPDFIFO (ECP Data FIFO) Mode = 011...................................................................... 64
TFIFO (Test FIFO Mode) Mode = 110 ............................................................................ 64
CNFGA (Configuration Register A) Mode = 111 ............................................................. 64
CNFGB (Configuration Register B) Mode = 111 ............................................................. 64
ECR (Extended Control Register) Mode = all ................................................................. 65
Bit Map of ECP Port Registers ........................................................................................ 66
ECP Pin Descriptions ...................................................................................................... 67
ECP Operation................................................................................................................. 68
FIFO Operation................................................................................................................ 68
DMA Transfers................................................................................................................. 69
Programmed I/O (NON-DMA) Mode ............................................................................... 69
KB Control Register (Logic Device 5, CR-F0) ................................................................. 74
Port 92 Control Register (Default Value = 0x24)............................................................. 74
OW
Data Swapper ................................................................................................................. 56
Printer Control Latch and Printer Control Swapper ........................................................ 58
EPP Pin Descriptions...................................................................................................... 60
Device Status Register (DSR) ........................................................................................ 62
UFFER
R
I
B
NTERFACE
EGISTER
UFFER
P
C
/ S
GATEA20/K
ARALLEL
APABILITIES
............................................................................................................................... 72
ECURITY
FDD M
2FDD M
.............................................................................................................................. 70
........................................................................................................................... 70
........................................................................................................................ 71
L
OGIC
P
ODE
ORT
K
ODE
EYBOARD AND
P
EYBOARD
ARALLEL
............................................................................................................ 55
(EXTFDD) .......................................................................................... 69
(EPP)................................................................................................. 56
(EXT2FDD) ...................................................................................... 69
R
(ECP) P
ESET
M
OUSE
-III -
C
ORT
ONTROL
W
........................................................................... 61
AKE
L
-U
OGIC
P
.............................................................. 75
........................................................... 73
Publication Release Date: April 2003
W83977EF
Revision 1.1