W83977EF Winbond Electronics Corp America, W83977EF Datasheet - Page 49

• Manufacturer Part Number: W83977EF
• Description: Description = W83877TF Plus Kbc, GP I/O, Wake-Up, Power Fail Resume ;; Package = QFP 128
• Manufacturer: Winbond Electronics Corp America

In the PS/2 Model 30 mode, the bit definitions are as follows:
DSKCHG (Bit 7):
This bit indicates the status of DSKCHG# input.
Bit 6-4: These bits are always a logic 1 during a read.
DMAEN (Bit 3):
This bit indicates the value of DO REGISTER bit 3.
NOPREC (Bit 2):
This bit indicates the value of CC REGISTER NOPREC bit.
DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC.
This register is used to control the data rate. In the PC/AT and PS/2 mode, the bit definitions are as
follows:
Bit 7-2: Reserved. These bits should be set to 0.
DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC.
In the PS/2 Model 30 mode, the bit definitions are as follows:
2.2.9 Configuration Control Register (CC Register) (Write base address + 7)
X: Reserved
x
7
7
x
6
6
0
x
5
5
0
0
x
4
4
-43 -
3
x
3
2
x
2
1
1
0
DSKCHG#
DRATE0
DRATE1
NOPREC
DMAEN
0
Publication Release Date: April 2003
DRATE0
DRATE1
W83977EF
Revision 1.1