at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 177

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

20.5.1
20.5.2
20.5.3
20.5.4
20.5.5
20.5.6
6249D–ATARM–20-Dec-07
Bus Multiplexing
Pull-up Control
Static Memory Controller
SDRAM Controller
ECC Controller
CompactFlash Support (EBI0 only)
The EBI0 and EBI1 offers a complete set of control signals that share the 32-bit data lines, the
address lines of up to 26 bits and the control signals through a multiplex logic operating in func-
tion of the memory area requests.
Multiplexing is specifically organized in order to guarantee the maintenance of the address and
output control lines at a stable state while no external access is being performed. Multiplexing is
also designed to respect the data float times defined in the Memory Controllers. Furthermore,
refresh cycles of the SDRAM are executed independently by the SDRAM Controller without
delaying the other external Memory Controller accesses.
The EBI0_CSA and EBI1_CSA registers in the Chip Configuration User Interface permit
enabling of on-chip pull-up resistors on the data bus lines not multiplexed with the PIO Controller
lines. The pull-up resistors are enabled after reset. Setting the EBIx_DBPUC bit disables the
pull-up resistors on the D0 to D15 lines. Enabling the pull-up resistor on the D16-D31 lines can
be performed by programming the appropriate PIO controller.
For information on the Static Memory Controller, refer to the Static Memory Controller section.
For information on the SDRAM Controller, refer to the SDRAM section.
For information on the ECC Controller, refer to the ECC section.
The External Bus Interface 0 integrates circuitry that interfaces to CompactFlash devices.
The CompactFlash logic is driven by the Static Memory Controller (SMC) on the NCS4 and/or
NCS5 address space. Programming the EBI0_CS4A and/or EBI0_CS5A bit of the EBI0_CSA
Register in the Chip Configuration User Interface to the appropriate value enables this logic. For
details on this register, refer to the in the Bus Matrix Section. Access to an external Compact-
Flash device is then made by accessing the address space reserved to NCS4 and/or NCS5 (i.e.,
between 0x5000 0000 and 0x5FFF FFFF for NCS4 and between 0x6000 0000 and 0x6FFF
FFFF for NCS5).
All CompactFlash modes (Attribute Memory, Common Memory, I/O and True IDE) are sup-
ported but the signals _IOIS16 (I/O and True IDE modes) and _ATA SEL (True IDE mode) are
not handled.
• the ECC Controller (ECC)
• a chip select assignment feature that assigns an AHB address space to the external devices
• a multiplex controller circuit that shares the pins between the different Memory Controllers
• programmable CompactFlash support logic (EBI0 only)
• programmable NAND Flash support logic
AT91SAM9263 Preliminary
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