at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 201
at91sam9263
Manufacturer Part Number
at91sam9263
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9263.pdf
(1065 pages)
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Figure 21-7. Connection of 2x16-bit Data Bus on a 32-bit Data Bus (Byte Select Option)
Table 21-3.
21.8
6249D–ATARM–20-Dec-07
Signal Name
Device Type
Byte Access Type (BAT)
NBS0_A0
NWE_NWR0
NBS1_NWR1
NBS2_NWR2_A1
NBS3_NWR3
Standard Read and Write Protocols
SMC Multiplexed Signal Translation
In the following sections, the byte access type is not considered. Byte select lines (NBS0 to
NBS3) always have the same timing as the A address bus. NWE represents either the NWE sig-
nal in byte select access type or one of the byte write lines (NWR0 to NWR3) in byte write
access type. NWR0 to NWR3 have the same timings and protocol as NWE. In the same way,
NCS represents one of the NCS[0..7] chip select lines.
Byte Select
1x32-bit
NBS0
NBS1
NBS2
NBS3
NWE
SMC
D[31:16]
D[15:0]
NCS[3]
A[25:2]
NBS0
NBS1
NBS2
NBS3
NRD
NWE
Byte Select
32-bit Bus
2x16-bit
NBS0
NBS1
NBS2
NBS3
NWE
Byte Write
4 x 8-bit
NWR0
NWR1
NWR2
NWR3
AT91SAM9263 Preliminary
Byte Select
1x16-bit
A[23:0]
Low Byte Enable
High Byte Enable
Read Enable
Memory Enable
D[15:0]
Write Enable
A[23:0]
Write Enable
Low Byte Enable
High Byte Enable
Read Enable
Memory Enable
D[31:16]
NBS0
NBS1
NWE
A1
16-bit Bus
Byte Write
2 x 8-bit
NWR0
NWR1
A1
8-bit Bus
1 x 8-bit
NWE
A0
A1
201
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