at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 183

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 20-7. NAND Flash Signal Multiplexing on EBI Pins
20.5.7.2
20.5.7.3
6249D–ATARM–20-Dec-07
External Bus Interface 1
NAND Flash Signals
SMC
The NAND Flash logic is driven by the Static Memory Controller on the NCS2 address space.
Programming the EBI1_CS2A field in the EBI1_CSA Register in the Chip Configuration User
Interface to the appropriate value enables the NAND Flash logic. For details on this register,
refer to the Bus Matrix Section. Access to an external NAND Flash device is then made by
accessing the address space reserved to NCS2 (i.e., between 0x9000 0000 and 0x9FFF FFFF).
The NAND Flash Logic drives the read and write command signals of the SMC on the NANDOE
and NANDWE signals when the NCS2 signal is active. NANDOE and NANDWE are invalidated
as soon as the transfer address fails to lie in the NCS2 address space. See
183
section.
The address latch enable and command latch enable signals on the NAND Flash device are
driven by address bits A22 and A21 of the EBI address bus. The command, address or data
words on the data bus of the NAND Flash device are distinguished by using their address within
the NCSx address space. The chip enable (CE) signal of the device and the ready/busy (R/B)
signals are connected to PIO lines. The CE signal then remains asserted even when NCSx is
not selected, preventing the device from returning to standby mode.
for more information. For details on these waveforms, refer to the Static Memory Controller
NWR0_NWE
NCSx
NRD
NAND Flash Logic
AT91SAM9263 Preliminary
NANDOE
NANDWE
NANDOE
NANDWE
Figure 20-7 on page
183