zl30119 Zarlink Semiconductor, zl30119 Datasheet - Page 19

• Manufacturer Part Number: zl30119
• Description: Low Jitter Line Card Synchronizer
• Manufacturer: Zarlink Semiconductor

(Hex)
Addr
1A
1B
1C
1D
1E
12
13
14
15
16
17
18
19
1F
20
21
22
detected_ref_2
detected_ref_3
detected_sync_0
detected_sync_1
oor_ctrl_0
oor_ctrl_1
oor_ctrl_2
oor_ctrl_3
gst_mask_0
gst_mask_1
gst_qualif_time
dpll1_ctrl_0
dpll1_ctrl_1
dpll1_modesel
dpll1_refsel
dpll1_ref_fail_mask
dpll1_wait_to_restore
Register
Name
Table 5 - Register Map (continued)
Description
Description
Description
Register
Register
Register
Reset
Value
(Hex)
See
See
See
EE
FF
FF
0E
FF
FF
1A
3C
33
33
33
33
00
00
Zarlink Semiconductor Inc.
ZL30119
DPLL1 Control
Sync2 auto-detected frequency value and sync
Control register for the ref0 and ref1 out of
Control register for the ref2 and ref3 out of
Control register for the ref4 and ref5 out of
Control register for the ref6 and ref7 out of
Control register to mask the inputs to the guard
Control register to mask the inputs to the guard
Ref4 and ref5 auto-detected frequency value
status register
Ref6 and ref7 auto-detected frequency value
status register
Sync0 and sync1 auto-detected frequency
value and sync failure status register
valid status register
range limit
range limit
range limit
range limit
soak timer for ref0 to ref3
soak timer for ref4 to ref7
Control register for the guard_soak_timer
qualification time and disqualification time for
the references
Control register for the DPLL1 filter control;
phase slope limit, bandwidth and hitless
switching
Holdover update time, filter_out_en,
freq_offset_en, revert enable
Control register for the DPLL1 mode of
operation
DPLL1 reference selection or reference
selection status
Control register to mask each failure indicator
(SCM, CFM, PFM and GST) used for automatic
reference switching and automatic holdover
Control register to indicate the time to restore a
previous failed reference
19
Description
Data Sheet
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R