saa569x NXP Semiconductors, saa569x Datasheet - Page 46

• Manufacturer Part Number: saa569x
• Description: Enhanced Tv Microcontrollers With On-screen Display Osd
• Manufacturer: NXP Semiconductors

Philips Semiconductors
16.3.3
The SAD module (see Fig.11) incorporates a DC
Comparator mode, which is selected using the
‘DC_COMP’ control bit in the SADB SFR. This mode
enables the microcontroller to detect a threshold crossing
at the input to the selected analog input pin
(P3.0/ADC0, P3.1/ADC1, P3.2/ADC2 or P3.3/ADC3) of
the software ADC. A level sensitive interrupt is generated
when the analog input voltage level at the pin falls below
the analog output level of the SAD DAC.
This mode is intended to provide the device with a
wake-up mechanism from Power-down or Idle mode when
a key-press on the front panel of the TV is detected.
The following software sequence should be used when
utilizing this mode for Power-down or Idle mode:
1. Disable INT1 using the IEN0 SFR
2. Set INT1 to level sensitive using the TCON SFR
3. Set the DAC digital input level to the desired threshold
4. Enter DC Compare mode by setting the ‘DC_COMP’
5. Enable INT1 using the IEN0 SFR
6. Enter Power-down/Idle mode. Upon wake-up, the
2002 May 06
Enhanced TV microcontrollers with
On-Screen Display (OSD)
level using SAD/SADB SFRs and select the required
input pin (P3.0, P3.1, P3.2 or P3,3) using CH1 and
CH0 in the SAD SFR
enable bit in the SADB SFR
SAD should be restored to its conventional operating
mode by disabling the ‘DC_COMP’ control bit.
SAD DC C
OMPARATOR MODE
46
handbook, halfpage
ADC0
ADC1
ADC2
ADC3
SADB < 3:0 >
SAD < 3:0 >
CH < 1:0 >
Fig.11 SAD block diagram.
V DDP
SAA567x; SAA569x
8-BIT
MUX
4 : 1
DAC
Objective specification
MBK960
VHI