saa569x NXP Semiconductors, saa569x Datasheet - Page 8

• Manufacturer Part Number: saa569x
• Description: Enhanced Tv Microcontrollers With On-screen Display Osd
• Manufacturer: NXP Semiconductors

Philips Semiconductors
2002 May 06
G
R
VDS
HSYNC
VSYNC
V
V
OSCGND
XTALIN
XTALOUT
RESET
RESET
V
P1.0/INT1
P1.1/T0
P1.2/INT0
P1.3/T1
P1.6/SCL0
P1.7/SDA0
P1.4/SCL1
P1.5/SDA1
RD
WR
EA
PSEN
ALE
AD0 to AD7
A0 to A7
A8 to A14
A15_LN to A17_LN
MOVX_WR
MOVX_RD
SSP
DDC
DDP
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SYMBOL
49, 40, 39,
38, 27, 26,
67 to 64,
37, 36, 8
85 to 92
7, 77, 3
12, 60
23, 15
PIN
47
48
52
53
55
63
69
70
71
72
73
75
76
78
79
80
81
82
83
84
10
14
19
20
68
74
9
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
pixel rate output of the GREEN colour information
pixel rate output of the RED colour information
video/data switch push-pull output for dot rate fast blanking
Schmitt-triggered input for a TTL-level version of the horizontal sync pulse;
the polarity of this pulse is programmable by register bit TXT1.H POLARITY
Schmitt-triggered input for a TTL-level version of the vertical sync pulse; the
polarity of this pulse is programmable by register bit TXT1.V POLARITY
periphery ground
3.3 V core power supply
crystal oscillator ground
12 MHz crystal oscillator input
12 MHz crystal oscillator output
if the reset input is LOW for at least 24 crystal oscillator periods while the
oscillator is running, the device is reset (internal pull-up)
if the reset input is HIGH for at least 24 crystal oscillator periods while the
oscillator is running, the device is reset. This pin should be connected to
V
3.3 V periphery power supply
Port 1: 8-bit programmable bidirectional port with alternative functions.
P1.0/INT1 is external interrupt 1 which can be triggered on the rising and
falling edge of the pulse; P1.1/T0 is Timer/counter 0; P1.2/INT0 is external
interrupt 0; P1.3/T1 is Timer/counter 1; P1.6/SCL0 is the serial clock input
for the I
is the serial clock input for the I
the I
read control signal to external data memory
write control signal to external data memory
control signal used to select external (LOW) or internal (HIGH) program
memory (internal pull-up)
enable signal for external program memory
external latch enable signal; active HIGH
address lines A0 to A7 multiplexed with data lines D0 to D7
address lines A0 to A7
address lines A8 to A14
address lines A15 to A17; note 1
MOVX Write for Hitex 80C51 emulation (internal MOVX Write instruction)
MOVX Read for Hitex 80C51 emulation (internal MOVX Read instruction)
DDC
2
C-bus
via a capacitor if an active HIGH reset is required (internal pull-down).
2
C-bus; P1.7/SDA0 is the serial data port for the I
8
DESCRIPTION
2
C-bus; P1.5/SDA1 is the serial data port for
SAA567x; SAA569x
Objective specification
2
C-bus; P1.4/SCL1